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Ann Mutschler

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Ann Mutschler is senior executive editor at Semiconductor Engineering.

Author's Latest Posts

Self-Service Comparisons Come To SoC Design
By Ann Mutschler - 23 May, 2014 - Comments: 0

Under the guise of enabling self-service comparison of its compilable memories and providing self-service online quoting of TSMC technology, semiconductor design and manufacturing services provider eSilicon Corp. detailed the latest evolution of its business model—and one that could have interesting implications for the IP and memory markets. This move reflects the changing dynamics of cus... » read more

The Assertion Conundrum
By Ann Mutschler - 22 May, 2014 - Comments: 2

It is well documented and widely agreed that assertions can provide a tremendous benefit to design and verification teams by reducing and even eliminating debug – but their use is still not ubiquitous. Part of the reason is that assertions cannot be picked up casually, noted David Larson, director of verification at [getentity id="22150" e_name="Synapse Design"]. “This is because asserti... » read more

When And Where To Use Virtual Prototypes
By Ann Mutschler - 22 May, 2014 - Comments: 0

Just because something is technically possible doesn’t always mean it should be done. This definitely holds true currently when it comes to virtual prototypes, which have gotten a lot of attention for their potential in the SoC design process—especially for concurrent software development. While no one is pointing fingers, there are situations in which design teams have thrown themselves... » read more

System Bits: May 20
By Ann Mutschler - 20 May, 2014 - Comments: 0

Re-routing noise away from measurement Today, we are capable of measuring the position of an object with unprecedented accuracy, but quantum physics and the Heisenberg uncertainty principle place fundamental limits on our ability to measure. Noise that arises as a result of the quantum nature of the fields used to make those measurements imposes what is called the "standard quantum limit," whi... » read more

Power/Performance Bits: May 20
By Ann Mutschler - 20 May, 2014 - Comments: 0

Visualizing complex electronic states While producing the first detailed visualization — down to the level of individual atoms — of exactly how a material called sodium manganese dioxide that has shown promise for use in electrodes in rechargeable batteries behaves during charging and discharging, a team of researchers led by MIT has explained an exotic molecular state that may help in und... » read more

EDA Races To 7nm, Despite Litho Uncertainties
By Ann Mutschler - 16 May, 2014 - Comments: 0

It’s becoming almost painful to refer to the delay with EUV, but it certainly isn’t stopping anyone on the design side from tweaking design tools or working on test chips. Clearly, things are moving ahead to 7nm even though lithography plans aren't yet clear. Steve Carlson, group marketing director in Cadence’s Office of Chief Strategy, said with regard to EUV, “They have the power p... » read more

Power/Performance Bits: May 13
By Ann Mutschler - 13 May, 2014 - Comments: 0

More electricity out of solar cells When sunlight shines on today’s solar cells, much of the incoming energy is given off as waste heat rather than electrical current but in a few materials, extra energy produces extra electrons. According to researchers at MIT, this behavior could significantly increase solar-cell efficiency. The team has identified the mechanism by which the phenomenon ... » read more

System Bits: May 13
By Ann Mutschler - 13 May, 2014 - Comments: 0

Bringing hyperbolic metamaterials closer to reality Purdue Researchers have taken a step toward practical applications for hyperbolic metamaterials, which are ultra-thin crystalline films that could bring optical advances for microscopes, quantum computers and high-performance solar cells. Optical metamaterials harness clouds of electrons called surface plasmons to manipulate and control li... » read more

IP To Meet 2.5D Requirements
By Ann Mutschler - 08 May, 2014 - Comments: 1

The semiconductor industry is still in the early stages of evolution in the realm of 2.5D, but when these devices do come out, the IP used on them will have to be brand new, according to Javier DeLaCruz, senior director of engineering at eSilicon. “The IP causes the biggest risk that you’re going to have in this implementation,” he said. “Everything else in here for making those ASIC... » read more

Improving LP Verification Efficiency
By Ann Mutschler - 08 May, 2014 - Comments: 1

The addition of low power circuitry can create so many corner cases that many can escape even the best-written testbenches. This has driven the need for so many additional verification cycles to be run that there must be many datacenter managers at semiconductor companies wondering if it is a trick by the power companies to cause an equal amount of power to be consumed by low-power verification... » read more

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