Author's Latest Posts


Schedule Versus Specifications


With power being paramount in SoCs today, I was surprised to hear the amount of time spent on power reduction exercises can be only a few days. According to William Ruby at Ansys/Apache, how much time engineers spend on power reduction activities depends on how sensitive the design is to power and whether they are still trying to meet the power spec or -- based on the early power estimates �... » read more

Power Reduction Through Sequential Optimization


Dealing with power is a multifaceted challenge and is an equal-opportunity problem — everybody can contribute to the solution and at many levels of abstraction. At the architectural or system level, fundamental tradeoffs are done and the engineering team decides how much memory the system needs, what type of processor, what performance, area, power, among other things. Some people may use ... » read more

Heat Problems Grow With FinFETs, 3D-ICs


From high-end consumer devices to rack-mounted arrays inside of data centers, thermal issues are becoming more serious—and getting much more attention. Driving this shift is the move from single chips to 3D ICs, whether they are interposer-based or stacked die. It’s a well-understood challenge: Die stacking can cause thermal issues because of the lack of a readily accessible thermal diss... » read more

Power/Performance Bits: Feb. 11


Low-power chip for cochlear implants without external hardware Existing versions of cochlear implants require that a disk-shaped transmitter about an inch in diameter be affixed to the skull, with a wire snaking down to a joint microphone and power source that looks like an oversized hearing aid around the patient’s ear...until now. Researchers at MIT’s Microsystems Technology Laboratory a... » read more

System Bits: Feb. 11


Ballistic transport in graphene Using electrons more like photons could provide the foundation for a new type of electronic device that would capitalize on the ability of graphene to carry electrons with almost no resistance even at room temperature in a process known as ballistic transport, according to researchers at Georgia Tech. Ballistic transport is the process by which electrical res... » read more

System Bits: Feb. 4


Speeding Access To Information Big data today is usually stored on multiple hard disks on a number of machines across an Ethernet network, but this storage architecture considerably increases the time it takes to access the information. Researchers at MIT have developed a storage system for big-data analytics they claim can dramatically reduce the time it takes to access information. The sy... » read more

Power/Performance Bits: Feb. 4


Lead halide perovskites Paving the way to the design of photovoltaic converters with improved efficiency, researchers at Ecole Polytechnique Fédérale de Lausanne (EPFL) said they have uncovered the mechanism by which solar cells based on lead iodide perovskite light-absorbing semiconductor transfer electrons along their surface. Photovoltaic systems based on lead halide perovskite are a n... » read more

The Uncertain Future Of Fabless Semis


As with most things, perspective is everything, this is especially true when it comes to changes in the semiconductor ecosystem. Some industry watchers say indicators clearly point to a shift happening where system OEMs again make the decisions about what is in a chip, both software and hardware, pointing to Apple, Samsung, Microsoft and Intel as prime examples. As a result, the fabless semicon... » read more

How To Speed Up Verification


Software requirements have changed the tapeout process in today’s SoCs so much that it isn’t uncommon to hear a design can’t be released because Android hasn’t booted. “It’s one of those things where you really understand that what used to be classic hardware verification that said ‘the chip is done’ is heavily impacted by if it actually does software things,” noted Frank S... » read more

System Bits: Jan. 28


Collaborative software for linking performance, cost Researchers from Georgia Tech have created a web-based tool that lets physically-separated participants collaborate on model-based systems engineering projects. Referred to as the Framework for Assessing Cost and Technology (FACT), the program utilizes open-source software components to allow users to visualize a system's potential expens... » read more

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