Author's Latest Posts


The Higher Cost Of Automotive


A revolution is occurring under the hoods of vehicles today, as the automotive industry continues to add sophistication via electronics to vehicles at a pace never seen before. But because of the automotive ecosystem’s tiered structure, system companies, IP and embedded software developers and tools vendors must invest more just to participate. Robert Bates, chief safety officer in [getent... » read more

System Bits: Aug. 2


Helping drones navigate urban environments While it has been widely discussed, Amazon wants to start using drones to deliver packages by 2017, but if you live in a high-rise apartment, you might be waiting a bit longer because because UAVs (Unmanned Aerial Vehicles) use GPS for localization and navigation but in urban areas, high-rise buildings may block the line of sight to GPS satellites, ca... » read more

What’s Holding Back Analog?


The uneasy relationship between digital and analog, coupled with tools that are either ineffective or outright ignored by the analog community, may be limiting the growth potential and technological advances in that market. That certainly doesn’t mean analog isn’t growing. In fact, analog is an increasingly critical component of ICs and the electronic devices they inhabit. The global ele... » read more

Making Verification Easier


SoC design teams increasingly are confronting complexity in the quest to target application segments, but at the same time they are struggling to more quickly reduce risk in their designs while also speed up testing to make sure everything works. Those often-conflicting goals have transformed [getkc id="10" kc_name="verification"] IP from an interesting concept to a must-have tool for advanc... » read more

How Cache Coherency Impacts Power, Performance


As discussed in part one, one of the reasons cache coherency is becoming more important is the shared common memory resource in designs today. Various agents in the design want to access the data the fastest they can, putting pressure on the CPU complex to manage all of the requests. Until a generation ago, it was okay for the CPU to control that memory and have access to it, as well as be t... » read more

System Bits: July 26


Mixing topology, spin MIT researchers are studying new compounds, such as topological insulators (TIs), which support protected electron states on the surfaces of crystals that silicon-based technologies cannot as part of the pursuit of material platforms for the next generation of electronics. They report new physical phenomena being realized by combining this field of TIs with the subfiel... » read more

System Bits: July 19


Using carbon nanotubes to leapfrog today’s silicon chips According to Stanford University’s Subhasish Mitra, associate professor of electrical engineering and of computer science, and H.-S. Philip Wong, professor of electrical engineering, the future of supercomputing might actually be really, really small. With support from the National Science Foundation, the two are working with IBM and... » read more

How Cache Coherency Impacts Power, Performance


Managing how the processors in an SoC talk to one another is no small feat, because these chips often contain multiple processing units and caches. Bringing order to these communications is critical for improving performance and [getkc id="106" kc_name="reducing power"]. But it also requires a detailed understanding of how data moves, the interaction between hardware and software, and what c... » read more

Power Confounds, Challenges


I have to admit I’m always surprised to hear that design teams are not using tools to the fullest extent possible, leaving valuable power saving opportunities on the table, until I remember how daunting it is to get it all right without tremendous experience, expertise, and the right tools. I’m also always fascinated to learn about less-obvious effects from power. To this point, Aveek... » read more

Implementation Limits Power Optimization


Implementation is still the step that makes or breaks power budgets in chip design, despite improvements in power estimation, power simulations, and an increase in the number of power-related architectural decisions. The reason: All of those decisions must be carried throughout the design flow. “If implementation decides to give up, then it doesn't really matter at the end of the day,” s... » read more

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