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Brian Bailey

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Brian Bailey is Technology Editor/EDA for Semiconductor Engineering.

Author's Latest Posts

Executive Insight: Simon Davidmann
By Brian Bailey - 10 Apr, 2014 - Comments: 0

Every industry has some colorful characters and within the EDA industry, Simon Davidmann is certainly one that comes to mind. For the past 30-something years, Davidmann has provided guidance to the industry, stood up for what he believes in, been an inspiration to many entrepreneurs, and had some fun along the way. Simon is a serial entrepreneur, angel investor and he has been a key person invo... » read more

High Level Synthesis: Significant Differences Remain
By Brian Bailey - 09 Apr, 2014 - Comments: 1

In part 1 of this experts series on high-level synthesis (HLS), Semiconductor Engineering sat down with Mike Meredith, vice president of technical marketing at Cadence/Forte Design Systems; Mark Warren, Solutions Group director at Cadence; Thomas Bollaert, vice president of application engineering at Calypto; and Devadas Varma, senior director at Xilinx. The initial part of the discussion looke... » read more

Tech Talk: Multipatterning, Take Two
By Brian Bailey - 31 Mar, 2014 - Comments: 0

Mentor Graphics' David Abercrombie continues with his whiteboard talk about coloring with advanced lithography, including what goes wrong and how to fix it. [youtube vid=HCBtvHCcbf4] » read more

EDA Shapes Its Future
By Brian Bailey - 27 Mar, 2014 - Comments: 2

In part one of this series, Semiconductor Engineering looked at growth within the EDA industry and the types of approaches being made to expand the scope of the markets that they serve. Scope expansion comes from the creation of new tools, the growth of companies in the IP space and the various ways in which opportunities can be found in new markets. Additional growth opportunities come from so... » read more

Formal Is Set To Overtake Simulation
By Brian Bailey - 27 Mar, 2014 - Comments: 4

There has been a significant psychology change in the area of formal verification over the past couple of years. It’s no longer considered a fringe technology, and it’s no longer considered difficult to use. In fact, it has become a necessary part of the verification process. Semiconductor Engineering sat down with a panel of experts to find out what caused this change and what more we c... » read more

We Are All Vulnerable
By Brian Bailey - 27 Mar, 2014 - Comments: 1

Target, Neiman Marcus, Michaels. We are all familiar with the huge loss of personal and financial data from these establishments. A lot more people are fuming over the data being accessed by the NSA. While we only know the details as leaked by Edward Snowden, this has to be the biggest data breach in history with the government having hacked into the data centers of Google, Yahoo and who knows ... » read more

High Level Synthesis Grows Up
By Brian Bailey - 13 Mar, 2014 - Comments: 2

When Semiconductor Engineering proposed this Experts At The Table discussion, which was held at the recently concluded DVCon, [getentity id="22032" e_name="Cadence"] had yet to express its intention to purchase [getentity id="22087" e_name="Forte"]. Little did we know that the stakes in the [gettech id="31015" comment="high-level synthesis"] (HLS) arena were being raised so high. Is this an in... » read more

Pointing Fingers In Verification
By Brian Bailey - 12 Mar, 2014 - Comments: 11

With most EDA tools, the buying decision is related to improved quality of results or increased productivity. Will a new synthesis or clock optimization tool enable designers to do more, faster and are those gains worth the price? The equation is fairly simple. When it comes to verification tools, things are more complex. You can still make productivity gains, or purchase an additional tool ... » read more

Tech Talk: Multipatterning
By Brian Bailey - 03 Mar, 2014 - Comments: 2

Mentor Graphics' David Abercrombie shows how multi patterning is supposed to be done, and what sorts of problems can crop up along the way. Now that EUV has hit another hiccup, the semiconductor industry has little choice. [youtube vid=tOs_OMSh4Nk] » read more

10 Must Knows About Virtual Prototypes
By Brian Bailey - 27 Feb, 2014 - Comments: 1

1. What is a virtual prototype? If you ask a room full of people to define ‘system’, you will get as many answers as there are people in the room. The same is true for virtual prototypes. A virtual prototype defines a model of something that is usually created by one group and used by another with some implied abstraction. It is a prototype that exists as a software model on which analysis... » read more

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