Author's Latest Posts

Managing Quality With Developer Desktop Analysis
By Synopsys - 24 Aug, 2016 - Comments: 0

Even the most seasoned developer is prone to introducing a few new bugs in new or modified code. Static analysis is a great solution to help development teams find and fix those issues. Now with Coverity’s new desktop analysis capabilities, developers can find and fix their own defects before checking their code into the source control management system – and before anyone else finds the de... » read more

Power Hungry?
By Synopsys - 10 Aug, 2016 - Comments: 0

Rapid changes in SoC power issues have forced a rethinking of methodologies throughout the design flow to account for power-related effects. At 65 nanometer process nodes and below, leakage power and dynamic power consumption make it increasingly difficult to meet power budgets. Achieving timing and signal integrity closure is now tightly coupled with power optimization and power net distributi... » read more

IC Validator Programmable EERC Netlist Domain Checking Technology
By Synopsys - 27 Jul, 2016 - Comments: 0

Traditional visual inspection or manual checking for electrical rule compliance is both time consuming and error prone. A new, comprehensive reliability solution is needed to reduce time to market, improve reliability and ensure longer device operation. This paper introduces IC Validator programmable Extended Electrical Rule Checking (EERC) and categorizes electrical rule checking (ERC) into th... » read more

Introduction to the Compute Express Link Standard
By Synopsys - 24 Jul, 2016 - Comments: 0

By Gary Ruggles, Sr. Product Marketing Manager, Synopsys Compute Express Link (CXL), a new open interconnect standard, targets intensive workloads for CPUs and purpose-built accelerators where efficient, coherent memory access between a Host and Device is required. A consortium to enable this new standard was recently announced simultaneously with the release of the CXL 1.0 specification. Th... » read more

Designing An Efficient DSP Solution
By Synopsys - 13 Jul, 2016 - Comments: 0

A look at the key challenges in DSP implementation from both hardware and software application perspectives, and how a properly selected and configured DSP processor coupled with an advanced software development toolchain can overcome these challenges. This white paper describes how to generate tight, efficient, and maintainable DSP code for a platform consisting of an IP core based on a specia... » read more

ISO 26262-Certified Solution For Testing of Safety-Critical Automotive ICs
By Synopsys - 29 Jun, 2016 - Comments: 0

Anti-lock braking systems, air bags, traction control, and electronic stability control are just a few examples of typical safety systems in current production cars. Next-generation safety systems, known as Advanced Driver Assistance Systems, or ADAS, are setting up the path for semi- and fully autonomous cars of the near future. Some ADAS technology uses a combination of cameras and radar to s... » read more

High Performance And Scalable Sensor Connectivity With MIPI I3C
By Synopsys - 15 Jun, 2016 - Comments: 0

The MIPI Alliance is working on a new standard called I3C (or SenseWire) that incorporates and unifies key attributes of I2C and Serial Peripheral Interface (SPI). MIPI I3C enhances the capabilities and performance of each approach with a comprehensive, low pin count and scalable interface as well as architecture. It supports sensor interface architectures that mobile, mobile-influenced, and em... » read more

Reliable Automotive IC Design With Galaxy Design Platform
By Synopsys - 25 May, 2016 - Comments: 0

Automakers are continuously integrating new advanced driver assistance systems and in-vehicle infotainment (IVI) technologies to provide drivers and their passengers with improved safety, navigation, entertainment and communications. Cars are becoming safer and more efficient as they are increasingly capable of sensing and responding to their on-road environment. These trends present additional... » read more

Achieve Functional Safety And High Uptime Using TMR
By Synopsys - 11 May, 2016 - Comments: 0

A look at how to build reliable FPGA-based designs, employing triple modular redundancy. To read more, click here. » read more

Securing The Internet of Things Using Hardware Rooted Processor Security — An Architect’s Guide
By Synopsys - 27 Apr, 2016 - Comments: 0

Security is a key requirement for Internet of Things (IoT) devices and must be considered for all aspects of the design. This paper provides an overview of security basics, feature requirements, technical solutions, and associated system-level trade-offs for implementing security in IoT devices. Making the required trade-offs is significantly easier by leveraging secure, proven building blocks ... » read more

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