The Week In Review: Design

By Jesse Allen - 23 Mar, 2018 - Comments: 0

M&A Synopsys acquired Silicon and Beyond, a provider of high-speed SerDes and ADC/DAC IP. The company was founded in 2012 as SilabTech and headquartered in Bangalore. Synopsys highlighted the team of R&D engineers with high-speed SerDes expertise that would be joining with the acquisition. Terms of the deal were not disclosed. ANSYS will acquire OPTIS, a provider of software for sci... » read more

Smaller, Faster, Cheaper—But Different

By Ed Sperling - 22 Mar, 2018 - Comments: 0

The old mantra of "smaller, faster, cheaper" has migrated from the chip level to the electronic system level, raising some interesting questions about where the real value is being generated. Smaller as it pertains to gate size, line widths and spaces, will continue in an almost straight line for at least the next decade. The ability to print three-dimensional features on a nanoscale using E... » read more

Verification And Validation Brothers

By Brian Bailey - 22 Mar, 2018 - Comments: 0

At DVCon this year, Doug Amos took the stage for the [getentity id="22017" e_name="Mentor, a Siemens Business"] sponsored lunch presentation. For those of you who were there but decided to skip the lunch, expecting the traditional forced sales pitch, you made a mistake. Amos is one of those rare people who know how to inject humor, teaching and marketing into a single presentation such that the... » read more

How Automotive ICs Are Reshaping Semiconductor Test

By Steve Pateras - 22 Mar, 2018 - Comments: 0

The growth of a new IC market creates ripples along the entire supply chain. Today, we see the semiconductor industry reacting to the needs of the growing automotive IC market, including the development of new IC test tools and methods. The automotive IC market is far and away the fastest growing end-use market with 15% CAGR (according to IC Insights). It is also seeing many new players. Mar... » read more

In-Design Rail Analysis Is A Beautiful Thing

By Kenneth Chang - 22 Mar, 2018 - Comments: 0

As a long time designer, ASIC flows amaze me and making them better is my goal. Although a very complex and intricate process, each part of the ASIC flow abstracts the complexity underneath it to ultimately create silicon that could end up in your smartwatch, your electric vehicle, or the latest cell phone – how amazing! Consumers concerns include product reliability and robustness, which bri... » read more

Deep Learning Market Forces

By Mike Gianfagna - 22 Mar, 2018 - Comments: 0

Last week, eSilicon participated in a deep learning event at the Computer History Museum – “ASICs Unlock Deep Learning Innovation.” Along with Samsung, Amkor Technology and Northwest Logic, we explored how our respective companies form an ecosystem to develop deep learning chips for the next generation of applications. We also had a keynote presentation on deep learning from Ty Garibay, C... » read more

Simplifying SystemVerilog Functional Coverage

By Henry Chan - 22 Mar, 2018 - Comments: 0

Let’s say you have a block you need to verify. How do you know that the stimulus you are about to use is exhaustive enough and that you have covered the necessary scenarios/situations to prove it is working correctly? This is where functional coverage comes in. SystemVerilog’s functional coverage constructs allow you to quantify the completeness of your stimulus by recording the values that... » read more

Can Big Data Help Coverage Closure?

By Brian Bailey - 22 Mar, 2018 - Comments: 0

Semiconductor designs are a combination of very large numbers and very small numbers. There is a large numbers of transistors at very small sizes, and databases are often large. The chip industry has been looking at [getkc id="305" kc_name="machine learning"] to effectively manage some of this data, but so far datasets have not been properly tagged across the industry and there is a reluctan... » read more

Embedded World 2018: Security, Safety, And Digital Twins

By Frank Schirrmeister - 22 Mar, 2018 - Comments: 0

This year's embedded world in Nuremberg was again very well attended despite a cold wave in Europe. The key trends I had expected to see were safety and security, and the exhibits did not disappoint. One additional key theme that stood out to me was that of “digital twinning.” And, of course, the battle of processor ecosystems does continue. RISC-V has joined the games and feels a bit like ... » read more