The Week In Review: Design

Safety-critical IP; digital twins; mobile video compression.


Tools & IP
Synopsys uncorked ASIL B, C, and D ready versions of its DesignWare EV6x Embedded Vision Processors for automotive SoCs. An included Safety Enhancement Package provides hardware safety features, safety monitors, and lockstep capabilities for safety-critical designs. The processors integrate scalar, vector DSP, and CNN processing units for automotive systems that require deep learning functionality.

ANSYS launched the latest update to its simulation suite. The electromagnetics tools added analysis capabilities for ADAS/automotive radar as well as integrated electrothermal analysis and new hybrid simulation techniques for PCB analysis. The update also contains a new product focused on digital twins, adding the ability to build, validate and deploy simulation-based digital twins within one workflow.

Flex Logix was issued a switch interconnect patent which enables the integration of any kind and amount of RAM between tiles of eFPGA arrays using silicon proven building blocks. Co-founders Cheng Wang and Geoff Tate were listed as the inventors.

VESA published a new display interface compression standard designed for embedded mobile display applications, VESA Display Compression-M (VDC-M). VDC-M provides a higher level of compression ratio (up to 5:1) at the same visually lossless quality level as VESA’s Display Stream Compression (DSC) standard, with the trade-off of higher circuit complexity.

The MIPI Alliance, which helped develop VDC-M, also released new versions of MIPI Display Serial Interface 2 (DSI-2) and MIPI Display Command Set (DCS) to support VDC-M. MIPI DSI-2 v1.1 specifies the physical link between the chip and display in devices, while MIPI DCS v1.4 specifies display functions such as resolution, width and brightness that are transmitted over MIPI DSI-2 v1.1.

Hardent announced VDC-M encoder and decoder IP.

NetSpeed Systems’ interconnect IP portfolio has been certified for the IEC 61508 functional safety standard at Safety Integrity Level 3 by SGS-TÜV Saar.

GlobalFoundries certified Synopsys’ IC Validator tool for physical signoff on the GF 14LPP process technology. The certified runsets, including DRC, LVS, and metal fill technology files, are now available.

OSR Enterprises, a Tier 1 automotive supplier, used multiple Arm Cortex-A57, Cortex-A53 and Cortex-R7 dual lock step cores in the latest generation of its EVOLVER platform for managing autonomous driving functions. The platform can consolidate multiple ECUs into a single system to centralize the vehicle’s main logic, while giving each ECU domain its own AI functionality.

OneSpin Solutions and Austemper Design Systems are teaming up on functional safety in the chip development flow. The companies validated a combined design and verification flow, which includes the insertion of hardware safety mechanisms into mission-critical chip designs and formal verification that the hardware safety logic is correct.

Korea Electric Power Corporation (KEPCO), South Korea’s largest utilities company, inked a multi-year agreement with Arm, which will provide IoT software and device management, hardware IP, and consulting services related to new smart utility use cases for KEPCO.

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