Achieving Successful Multi-Die Signoff
By Vamsi Thatha - 19 Dec, 2024 - Comments: 0

Multi-die designs leveraging 2.5D and 3D technologies are becoming crucial for various electronics applications, including high-performance computing (HPC), artificial intelligence (AI), automotive, and mobile devices. These designs allow the integration of dies from different foundries and technology nodes, enhancing density and interconnect speeds beyond traditional discrete dies. However, th... » read more

Nonvolatile Electrochemical Memory Cell For Temperatures Up To 600°C (U. Of Michigan, Sandia)
By Technical Paper Link - 18 Dec, 2024 - Comments: 0

A new technical paper titled "Nonvolatile electrochemical memory at 600°C enabled by composition phase separation" was published by researchers at University of Michigan and Sandia National Laboratories. "Moore’s law has led to monumental advances in computing over the past 50 years. However, one shortcoming of silicon-based logic and memory devices is their limited temperature range, typ... » read more

Blog Review: Dec. 18
By Jesse Allen - 18 Dec, 2024 - Comments: 0

Siemens’ Michael Munsey predicts that the convergence of AI, advanced packaging, and rise of software-defined products aren’t just incremental changes but will represent a fundamental shift in how we think about semiconductor design and manufacturing. Cadence's Veena Parthan points to hex-core voxels as a significant leap forward for the CFD meshing process that blends the best of struct... » read more

RISC-V Profiles Help Conformance
By Brian Bailey - 18 Dec, 2024 - Comments: 0

Experts At The Table: What's needed to be able to trust that a RISC-V implementation will work as expected across multiple designs using standard OSes. Semiconductor Engineering discussed the issue with John Min, vice president of customer service at Arteris; Zdeněk Přikryl, CTO of Codasip; Neil Hand, director of marketing at Siemens EDA (at the time of this discussion); Frank Schirrmeist... » read more

Optimizing New Interconnect Technologies To Support Next-Generation Semiconductor Devices
By Assawer Soussou - 18 Dec, 2024 - Comments: 0

Interconnects are the wiring system that connect together the components of a semiconductor device and permit these components to work together. One of the key metrics of any semiconductor interconnect scheme is the metal pitch size. Metal pitch is the minimum distance between the centers of two horizontal interconnects in a semiconductor. It's a key metric used to measure the progress of chip ... » read more

Heterogenous Integration Expertise for Sensors and MEMS Packaging and Assembly
By Promex Industries - 18 Dec, 2024 - Comments: 0

Sensors and microelectromechanical systems (MEMS) are unlocking new design possibilities for miniature devices used in healthcare, smart systems, consumer electronics, and more. Designers need a partner experienced with Heterogenous Integration (HI) to assemble the unique components for these devices and address the complications of these integrations. In this white paper, you will learn: ... » read more

Laser Ablation Dicing Revolutionizes Ultra-Thin Wafer Saws Beyond The Capability Of Blade Dicing
By Siang Miang Yeo - 17 Dec, 2024 - Comments: 0

The demand for consistently high electrical performance in the power discrete semiconductor market has driven component developers to continuously enhance semiconductor assembly packaging technology through advanced package design and wafer fabrication methods. Among the cost-effective approaches are increasing the die area size and decreasing the die thickness, which minimize electrical resist... » read more

TCAD Simulation Challenges For Gate-All-Around Transistors
By Victor Moroz - 17 Dec, 2024 - Comments: 0

By Victor Moroz and Shela Aboud The transition from finFET technology to Gate-All-Around (GAA) technology helps to reduce transistor variability and resume channel length scaling. It also brings several new challenges in terms of transistor design that need to be addressed. One of the challenges is handling the thin Si layers that come with GAA technology, where Si channel thickness scale... » read more

Baby Steps Toward 3D DRAM
By Bryon Moyer - 17 Dec, 2024 - Comments: 0

Flash memory has made incredible capacity strides thanks to monolithic 3D processing enabled by the stacking of more than 200 layers, which is on its way to 1.000 layers in future generations.[1] But the equally important DRAM has achieved a similar manufacturable 3D architecture. The need for a sufficiently large means of storing charge — such as a capacitor — has proved elusive. Severa... » read more

Do More With Less In Semiconductor Manufacturing
By David Park - 17 Dec, 2024 - Comments: 0

The recent resolution of labor disputes sheds light on a universal concern: the balance between automation and workforce dynamics. These situations mirror a challenge faced in semiconductor manufacturing—embracing AI without displacing the people driving the industry. Moving beyond automation fears US port workers expressed concerns about automation technologies, such as autonomous cranes a... » read more

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