Package Assembly Design Kits (PADK) Benefits For Packaging Design Engineers

By Amkor - 21 Nov, 2024 - Comments: 0

A new IEEE technical paper titled "Package Assembly Design Kits (PADK's)- The Future of Advanced Wafer-Level Manufacturing" was written by researchers from Amkor. Find the technical paper here. September 2024. "Although package design and IC design are two different worlds, they share several key similarities that have contributed to the successful use of Package Assembly Design Kits (PAD... » read more

New Tradeoffs In Leading-Edge Chip Design

By Katherine Derbyshire - 21 Nov, 2024 - Comments: 0

Device design begins with the anticipated workload. What is it actually supposed to do? What resources — computational units, memory, sensors — are available? Answering these questions and developing the functional architecture are the first steps in a new design — well before committing it to silicon, said Tim Kogel, senior director of technical product management at Synopsys. Yet eve... » read more

The State Of The EDA Industry In 2024

By Bob Smith - 21 Nov, 2024 - Comments: 0

In what has become a yearly custom, I recently spoke to Jay Vleeschhouwer, Managing Director of Griffin Securities, for an update on his view of the state of the electronic design automation (EDA) industry. My inquiries were based on his presentation at the 2024 Design Automation Conference (DAC). With his long background as an informed EDA industry follower, I knew it would be an enlightening ... » read more

Blog Review: Nov. 20

By Jesse Allen - 20 Nov, 2024 - Comments: 0

Siemens’ Jonathan Muirhead explains why matching and symmetry are so important for analog and RF circuits, especially in topological structures like differential pairs and current mirrors, and introduces checking techniques to ensure compliance. Cadence's Satish Kumar Padhi examines the significance of randomization in PCIe IDE verification, focusing on how it ensures data integrity and en... » read more

One Chip Vs. Many Chiplets

By Ed Sperling - 20 Nov, 2024 - Comments: 1

Experts at the Table: Semiconductor Engineering sat down to discuss the growing list of challenges at advanced nodes and in advanced packages, with Jamie Schaeffer, vice president of product management at GlobalFoundries; Dechao Guo, director of advanced logic technology R&D at IBM; Dave Thompson, vice president at Intel; Mustafa Badaroglu, principal engineer at Qualcomm; and Thomas Ponnusw... » read more

Using Formal For RISC-V Security

By Ed Sperling - 19 Nov, 2024 - Comments: 0

Finding and closing up security holes is becoming more important as chips are used in safety- and mission-critical applications, but it's increasingly important for chips designed for much less costly devices, where the selling price typically doesn't warrant a significant investment in security. The problem is these devices are connected to some of the same networks, and any access points for ... » read more

Research Bits: Nov. 19

By Jesse Allen - 19 Nov, 2024 - Comments: 0

Starchy nanocomposite films Researchers from Queen Mary University of London created biodegradable, flexible, and electrically conductive nanocomposite films made using potato starch instead of petroleum-based materials. The starch-based films decompose within a month when buried in soil. In addition to starch, the nanocomposite films contain the conductive 2D material MXene. Adjusting the ... » read more

Small Language Models: A Solution To Language Model Deployment At The Edge?

By Paul Karazuba - 18 Nov, 2024 - Comments: 0

While Large Language Models (LLMs) like GPT-3 and GPT-4 have quickly become synonymous with AI, LLM mass deployments in both training and inference applications have, to date, been predominately cloud-based. This is primarily due to the sheer size of the models; the resulting processing and memory requirements often overwhelm the capabilities of edge-based systems. While the efficiency of Exped... » read more

To (B)atch Or Not To (B)atch?

By Steve Roddy - 18 Nov, 2024 - Comments: 0

When evaluating benchmark results for AI/ML processing solutions, it is very helpful to remember Shakespeare’s Hamlet, and the famous line: “To be, or not to be.” Except in this case the “B” stands for Batched. Batch size matters There are two different ways in which a machine learning inference workload can be used in a system. A particular ML graph can be used one time, preced... » read more

Asia Government Funding Surges

By Liz Allan - 18 Nov, 2024 - Comments: 0

Billions of dollars have been pouring into Asian countries for the past few years in an effort to boost their production capacity, explore leading-edge technology, compete on the global stage, and shore up supply chains in the face of geopolitical turmoil. Each country has its own plan to maintain a foothold in the global market, from China’s Big Fund to Korea’s Yongin Cluster and Japan�... » read more

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