How Quickly Can You Take Your Idea To Chip Design?


Gone are the days of expensive tapeouts only done by commercial companies. Thanks to Tiny Tapeout, students, hobbyists, and more can design a simple ASIC or PCB design and actually send it to a foundry for a small fraction of the usual cost. Learners from all walks of life can use the resources to learn how to design a chip, without signing an NDA or installing licenses, faster than ever before... » read more

Enabling Multiscale Simulation


As product development teams face increasingly complex challenges — including the need for greater sustainability — there’s a growing awareness of the critical contributions made by materials. Many of our most pressing engineering challenges, from renewable energy grids to green transportation, rely on identifying or creating the right materials. Historically, materials discovery, mate... » read more

MPAM-Style Cache Partitioning With ATP-Engine And gem5


The Memory Partitioning and Monitoring (MPAM) Arm architecture supplement allows for memory resources (MPAM MSCs) to be partitioned using PARTID identifiers. This allows privileged software, like OSes and hypervisors to partition caches, memory controllers and interconnects on the hardware level. This allows for bandwidth and latency controls to be defined and enforced for memory requestors. ... » read more

Running More Efficient AI/ML Code With Neuromorphic Engines


Neuromorphic engineering is finally getting closer to market reality, propelled by the AI/ML-driven need for low-power, high-performance solutions. Whether current initiatives result in true neuromorphic devices, or whether devices will be inspired by neuromorphic concepts, remains to be seen. But academic and industry researchers continue to experiment in the hopes of achieving significant ... » read more

Power/Performance Costs In Chip Security


Hackers ranging from hobbyists to corporate spies and nation states are continually poking and prodding for weaknesses in data centers, cars, personal computers, and every other electronic device, resulting in a growing effort to build security into chips and electronic systems. The current estimate is that 60% of chips and systems have some type of security built in, and that percentage is ... » read more

Fallback Fails Spectacularly


Conventional AI/ML inference silicon designs employ a dedicated, hardwired matrix engine – typically called an “NPU” – paired with a legacy programmable processor – either a CPU, or DSP, or GPU. The common theory behind these two-core (or even three core) architectures is that most of the matrix-heavy machine learning workload runs on the dedicated accelerator for maximum efficienc... » read more

Comparing Leakage Detection Methods On RISC-V Cores (Radboud University)


A technical paper titled “Plan your defense: A comparative analysis of leakage detection methods on RISC-V cores” was published by researchers at Radboud University. Abstract: "Hardening microprocessors against side-channel attacks is a critical aspect of ensuring their security. A key step in this process is identifying and mitigating “leaky” hardware modules, which inadvertently lea... » read more

Demonstrating The Feasibility Of The Foundry Model For Flexible Thin-Film Electronics 


A technical paper titled “Multi-project wafers for flexible thin-film electronics by independent foundries” was published by researchers at KU Leuven and imec. Abstract: "Flexible and large-area electronics rely on thin-film transistors (TFTs) to make displays, large-area image sensors, microprocessors, wearable healthcare patches, digital microfluidics and more. Although silicon-based co... » read more

Testing/Probing Single Electrons Across 300mm Spin Qubit Wafers (Intel)


A technical paper titled “Probing single electrons across 300-mm spin qubit wafers” was published by researchers at Intel Corporation. Abstract: "Building a fault-tolerant quantum computer will require vast numbers of physical qubits. For qubit technologies based on solid-state electronic devices, integrating millions of qubits in a single processor will require device fabrication to reac... » read more

Controllable Interaction Between Two Hole Spin Qubits In A Conventional Silicon Transistor


A technical paper titled “Anisotropic exchange interaction of two hole-spin qubits” was published by researchers at University of Basel and IBM Research Europe-Zurich. Abstract: "Semiconductor spin qubits offer the potential to employ industrial transistor technology to produce large-scale quantum computers. Silicon hole spin qubits benefit from fast all-electrical qubit control and sweet... » read more

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