The Importance Of Metal Stack Compatibility For Semi IP


Every foundry and every node is different, but for every foundry/node there are multiple supported metal stacks. Some chips use a lot more metal layers than others. A common rule of thumb is each metal layer increases wafer cost 10%. So, a chip with 5 more metal layers than another will cost 50%+ more. The most complex, high performance chips, including performance FPGAs, typically use AL... » read more

Lightweight Cryptography: An Introduction


The National Institute of Standards and Technology (NIST) announced on February 7, 2023, that it had selected the ASCON algorithm to become the standard for Lightweight Cryptography. In this whitepaper, we will explore what lightweight cryptography is and why it is worth considering for specific Internet of Things (IoT) use cases. Download this white paper to learn: What lightweight cry... » read more

Robust Design Optimization Of A Ford Turbocharger Compressor


What is robust design optimization (RDO), and is it better than standard optimization? In this customer case, we describe a multi-disciplinary optimization of a turbocharger compressor from Ford Motor Company, in which we demonstrate it is. RDO combines standard numerical optimization with sensitivity analysis to take into account the influence of manufacturing variations and operating uncer... » read more

AI: Engineering Tool Or Threat To Jobs?


Semiconductor Engineering sat down to talk about using AI for designing and testing complex chips with Michael Jackson, corporate vice president for R&D at Cadence; Joel Sumner, vice president of semiconductor and electronics engineering at National Instruments; Grace Yu, product and engineering manager at Meta; David Pan, professor in the Department of Electrical and Computer Engineering a... » read more

Designing for Data Flow


Movement and management of data inside and outside of chips is becoming a central theme for a growing number of electronic systems, and a huge challenge for all of them. Entirely new architectures and techniques are being developed to reduce the movement of data and to accomplish more per compute cycle, and to speed the transfer of data between various components on a chip and between chips ... » read more

Design Challenges And Opportunities For Electric Powertrain With Vehicle Autonomy


According to recent studies, nearly 25% of all miles driven in the United States could be shared autonomous electrical vehicles (SAEVs) by 2030. Electric powertrain is indispensable for autonomous vehicles as it offers a) higher fuel efficiency and reduced CO2 emissions, b) an easier platform to support drive-by-wire systems needed for vehicle autonomy, and c) as battery prices keep dropping sh... » read more

Design IP


Cadence is a leader in semiconductor IP addressing hyperscale computing, enterprise, data center, automotive, and artificial intelligence/machine learning (AI/ML) applications. Our IP are available in advanced-process nodes ranging from 28nm to 3nm—all silicon verified in leading-edge foundry processes. Our memory IP portfolio spans DDR, LPDDR, and GDDR. The Cadence® IP family for PCI Expres... » read more

Blog Review: March 1


Siemens EDA's Chris Spear explains the UVM Factory and how it can facilitate collaboration by enabling injection of new features without affecting your team. Cadence's Paul McLellan looks at efforts to ensure chiplets from different companies work together, particularly when the creating companies didn't pre-plan for those specific chiplets to work together, as well as the problems of failur... » read more

Re-shoring And Rebuilding The IC Supply Chain


Raj Jammy, chief technologist at MITRE Engenuity and executive director of the Semiconductor Alliance, sat down with Semiconductor Engineering to talk about changes in the supply chain, where and how to leverage different capabilities, and why advanced packaging and manufacturing are so critical to economic security. SE: The global supply chain for semiconductors appears to be splintering. W... » read more

How To Build A Rock-Solid Software Security Initiative


Application security testing is the starting block, not the finish line. While a critical component of every security program, the “penetrate and patch” approach is not a strategy. You need a complete program to lower risk exposure, measure progress, and demonstrate results. The most effective AppSec programs—or software security initiatives—are fine-tuned to their respective organiz... » read more

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