Three Technologies Enabling The Next Decade Of Hyperconnectivity


As it has become a tradition in my 15 years of blogging, January is a month of both reflection and outlook. At the beginning of 2022, I am excited that key themes from 5 and 10 years ago—3D integration, artificial intelligence and machine learning (AI/ML), and ubiquitous needs for more connectivity driving 4G and 5G networks—clearly have exceeded expectations and forecasts from that time. L... » read more

Greener Design Verification


Chip designs are optimized for lower cost, better performance, or lower power. The same cannot be said about verification, where today very little effort is spent on reducing execution cost, run time, or power consumption. Admittedly, one is a per unit cost while the other is a development cost, but could the industry be doing more to make development greener? It can take days for regression... » read more

Using Symbolic Simulation For SRAM Redundancy Repair Verification


Innovations in Very Deep Sub-Micron technologies, such as the advent of three-dimensional FinFET transistor structures, have facilitated the implementation of very large embedded SRAM memories in System-on-Chip (SoC) designs to the point where they occupy the majority of the chip die area. To get maximum memory capacity on the smallest die area, SRAM bitcells are designed with the minimum possi... » read more

Dependable Verification Is The Foundation ICs Require


As our world becomes increasingly high-tech, it is easy to lose sight of the little things that make all of our fancy gadgets achieve optimal performance. The one thread that enables you to get all of the benefits of a new laptop, tablet, smartphone, or your automobile’s digital dashboard and connects the components that ensure best performance is the integrated circuit (IC). For as breath... » read more

Veloce Coverage App And Veloce Assertion App Deliver Unified Coverage Methodology


The interoperability of the Veloce Coverage app and the Veloce Assertion app with other verification engines (simulation and formal) enables merging coverage collected by each engine and provides a cohesive coverage closure report and analysis flow. It enables the verification team and product-level management to make important decisions such as coverage closure sign-off, test quality analysis ... » read more

Comparing And Spotting The Difference Between Two Simulations


Comparing is a basic skill we all use in our daily lives in order to understand reality and analyze situations. When it comes to chip verification, the fundamental task of checking also involves comparing because checking is always "checking vs. something" — the ASIC specification and/or a model. In practice, when we encounter a failing test, oftentimes we have a comparable passing tes... » read more

MIPI Standards Gaining Traction In New Markets


An explosion of low-cost, high-performance image sensors for a growing number of applications is propelling the MIPI interface into a variety of new markets, where standardized signal protocols and characteristics are becoming essential. For years, MIPI has been almost synonymous with mobile phones. But as higher-resolution image sensors increasingly are deployed in automotive, AI, IoT, and ... » read more

Leveraging Multi-Protocol PHY For PCIe To Cope With SoC Design Complexity


Now in the post-Moore’s Law era, the fast-evolving semiconductor market is continually geared toward higher performance and feature-rich integrated chip (IC) solutions. More functional design blocks integrated with growing interconnections—to not only increase the overall throughput but also expand the I/O connectivity—resulted in a more powerful system on chip (SoC). This increasing comp... » read more

6G: Going Beyond 100 Gbps To 1 Tbps


6G research is in its very early stages. The vision for what the International Telecommunication Union calls Network 2030 continues to take shape. While the industry is years away from starting the standards development process, subterahertz (sub-THz) territory is a focus of active research. Getting to 100 gigabits per second (Gbps) to 1 terabit per second (Tbps) data throughput is a key obj... » read more

Blog Review: Jan. 26


Arm's Mark Inskip shares how the Morello prototype architecture, aimed at improving the security of hardware, was developed, from the creation of the prototype architecture specification, followed by the design and implementation of a new CPU, through to the development of a new SoC, hardware platform, development tools, toolchains, and software. Cadence's Paul McLellan looks at how the RISC... » read more

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