category: Blogs – MD

category: IoT, Security & Automotive

Testing One, Two, Three
By Ed Sperling - 20 Sep, 2012 - Comments: 0

The sheer number of off-the-shelf parts that are showing up in ICs these days—and that includes both hard and soft parts—means that to a large extent we are designing and manufacturing a series of interconnected black boxes. Black boxes, at least in theory, are a major time saver. The idea that you can put together a series of well-designed, state-of-the-art Lego-like blocks that are pro... » read more

Power And Performance: GSS Sees SOI Advantages For FinFETs
By Various Writers - 17 Sep, 2012 - Comments: 0

Are FinFETs better on SOI? In a series of papers, high-profile blogs and subsequent media coverage,Gold Standard Simulations (aka GSS) has indicated that, yes, FinFETs should indeed be better on SOI. To those of us not deeply involved in the research world, much of this may seem to come out of nowhere.  But there’s a lot of history here, and in this blog we’ll take a look at what it’s... » read more

Patterned media – getting closer
By Michael Watts - 11 Sep, 2012 - Comments: 0

Imprint watchers are watching and waiting for news that patterned media has come of age….the question is … is there a technical barrier, or are manufacturers just waiting for the existing solution to run out of steam ? When I ask my contacts “if your boss said I want to buy a factory, can I pull the switch”…. the consistent answer is “we are not ready yet”. Reading and writing ... » read more

2011: A Look Back at the Semiconductor Equipment and Materials Market and Outlook
By Lara Chamness - 08 Sep, 2012 - Comments: 0

by Lara Chamness, senior market analyst, SEMI Semiconductor Market Trends 2011 was a record year for the semiconductor industry in many regards. First and foremost, semiconductor revenues approached the long elusive $300 billion mark. Secondly, semiconductor materials passed the record high set in 2010 to reach $47.9 billion. And finally, semiconductor equipment sales grew 9 percent, off ... » read more

Front-End Fab Equipment Spending To Grow 17% In 2013
By Christian Dieseldorff - 07 Sep, 2012 - Comments: 0

By Christian Gregor Dieseldorff SEMI just released an update to its World Fab Forecast database, which indicates that total fab spending for equipment needed to ramp fabs, upgrade technology nodes, and expand or change wafer size could increase 16.7 percent in 2013 to reach a new record high of $42.7 billion. The estimate includes new equipment, used equipment, or in-house equipment but exclu... » read more

Why the Big Players Like 450mm Wafers
By Chris Mack - 20 Aug, 2012 - Comments: 0

The reason semiconductor manufacturers like the idea of 450-mm wafers is easy to understand:  bigger wafers should lower the per-chip cost of manufacturing.  But as I mentioned in my last post, this per-chip cost advantage doesn’t apply to lithography.  Each time a wafer size is increased, only the non-litho (per-chip) costs go down, and so lithography costs take up a bigger portion of the... » read more

The Trouble With FinFETs
By Joanne Itow - 16 Aug, 2012 - Comments: 0

By Joanne Itow The industry’s quest to continue on the semiconductor roadmap defined by Moore’s Law has led to the adoption of a new transistor structure. Whether you call them finFETs, tri-gate or 3D transistors, building these new devices is difficult. But the technology is only half the challenge. In 2002, Chen Ming Hu* spoke at the Semico Summit. The title of his presentation was �... » read more

Ivy Bridge Settles Old Bet
By Marc David Levenson - 16 Aug, 2012 - Comments: 0

Think back seven years to 2005. Those were boom times with the housing market rising, the dollar high, 65nm node chips on the horizon and EUV the great future lithography hope. EUVL was late for the next (45nm) node, but a great new idea had appeared to fill the gap—water immersion scanning with 193nm exposure! But how far could wet 193nm lithography go before EUVL or some new thing, such as ... » read more

Double Patterning: Challenges And Possible Solutions In Parasitics Extraction
By David Abercrombie - 16 Aug, 2012 - Comments: 0

By Dusan Petranovic and David Abercrombie Double patterning (DP), as the simplest form of multi-patterning techniques, is receiving lots of attention right now. The need for double patterning techniques is driven by the physical limits of the dimensions that can be resolved with current light sources and lenses, as well as by the difficulties and delays in deploying next-generation lithography... » read more

The Threat Within
By Applied Materials Writers - 16 Aug, 2012 - Comments: 0

By Connie Duncan Given that today’s advanced chips can contain billions of transistors, 60 miles of copper wiring and 10 billion vertical connections between metal layers, the challenges and potential pitfalls this level of complexity presents are mind-boggling. One major problem on the horizon at 20nm and below is the threat of voids forming in the vertical interconnects commonly called via... » read more

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