category: Silicon Lifecycle Management

category: IoT, Security & Automotive

Don’t Let X Be A Problem For Logic BIST
By Rahul Singhal - 12 Oct, 2021 - Comments: 0

By Rahul Singhal and Giri Podichetty A failure in the operation of integrated circuits (ICs) or chips deployed in safety-critical applications such as automotive, medical, and aerospace could have catastrophic consequences. These failures could stem from defects in the chip that escaped manufacturing tests or from transient faults that can occur during system operation due to factors such as... » read more

SLM Is Changing The Complete Device Lifecycle Process
By Ramsay Allen - 13 Sep, 2021 - Comments: 0

Amit Sanghani, Vice President of Engineering, HW-Analytics and Test Group at Synopsys, discusses how Silicon Lifecycle Management (SLM) is changing the way we look at the complete device lifecycle process and how it can enable heightened levels of visibility in device performance, reliability and security. Learn how SLM is well placed to address the challenges that occur at every stage of cut... » read more

Power-Aware Test: Addressing Power Challenges In DFT And Test
By Rahul Singhal - 10 Aug, 2021 - Comments: 0

Integrated circuit (IC) sizes continue to grow as they meet the compute requirements of cutting-edge applications such as artificial intelligence (AI), autonomous driving, and data centers. As design sizes increase, the total power consumption of the chip also increases. While process node scaling reduces a transistor’s size and its operating-voltage, power scaling has not kept up with the si... » read more

Signal Connectivity Checks Are Not Just For Design-For-Test Teams
By Pawini Mahajan - 08 Jun, 2021 - Comments: 0

By Pawini Mahajan and Raja Koneru The complexity with system-on-chip (SoC) design continues to grow, creating greater complexity of the corresponding design-for-test (DFT) logic required for manufacturing tests. Design teams are challenged not only by high gate counts and the array of internally developed and third-party IP integrated into their designs: the need to achieve high-quality manu... » read more

In-Chip Sensing And PVT Monitoring: Not Just An Insurance Policy
By Ramsay Allen - 11 May, 2021 - Comments: 0

You wouldn’t drive an expensive car without insurance or take a flight in an aircraft without performing instrument and control surface checks. So why would you take the risk of designing a multi-million dollar advanced node semiconductor device without making sure you are aware of, and able to manage, the dynamic conditions that had the potential to make or break a silicon product? Advanced... » read more

Debug And Traceability Of MCMs And Chiplets In The Manufacturing Test Process
By Guy Cortez - 16 Apr, 2021 - Comments: 0

Single die packages and products have been the norm for decades. Moreover, so has multi-chip modules (MCMs) or system in package (SiP) for quite some time. Understandably, with ASICs and SoCs becoming larger while silicon geometries continue to get smaller, there is an opportunity to combine even more functionality into a smaller form factor for the end product. Hence, new advancements in desig... » read more

Security For Cars That Are Smartphones On Wheels
By Taylor Amerding - 06 Apr, 2021 - Comments: 1

Your modern car is a computer on wheels—potentially hundreds of computers on a set of wheels. Heck, even the wheels are infested with computers—what do you think prompts that little light on your dashboard to come on if your tire pressure is low? And computers don’t just run your infotainment system, backup camera, dashboard warning lights, and the voice that tells you to buckle your seat... » read more

Finally, Analyzing All Test And Manufacturing Data Automatically
By Guy Cortez - 09 Mar, 2021 - Comments: 0

Product quality and yield, operational efficiency, and time-to-market continue to be dominant drivers in the semiconductor industry. Adding to this complexity is a diverse manufacturing and test supply-chain of independent providers all continuously generating enormous amounts of different types of chip-related data in various formats. The knowledge contained within this data is critical to pro... » read more

A View Across The Siliconscape
By Stephen Crosher - 09 Feb, 2021 - Comments: 0

What would it look like if you had the magical ability to look inside a chip and cast your eyes across the tumultuous activities within the silicon itself? If you could gaze into the die and see the real-time peaks and troughs of voltage supply, stressed areas with high activity and heat and areas of calm where uneven workloads create idle processor cores. A vision of the chip landscape, seasca... » read more

Customer-Developed, Hyper-Convergent Design Flows Are Now Possible
By John Faase - 25 Jan, 2021 - Comments: 0

We all know the days of sequential, compartmentalized chip design are over. In advanced technology nodes, placement impacts performance, performance impacts power, and routing impacts everything. The way to manage these challenges is to interleave design tasks. For example, provide information on late-stage routing to early-stage synthesis tools to improve convergence. This technique is commonl... » read more

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