High-Performance 5G IC Designs Need High-Performance Parasitic Extraction

By Karen Chow - 23 Jun, 2022 - Comments: 0

By Karen Chow and Salma Ahmed Elhenedy We are rapidly approaching a future where 5G telecommunications will be the norm. With its increased data speeds and bandwidth, 5G has the potential to change the way we live our lives. But what does that mean for the average person? Think about cellphones, for one. You don't just use your phone for calling or texting anymore—you surf the web, chec... » read more

The Evolving Digital Journey Of The Electronics Value Chain

By Matt Walsh - 26 May, 2022 - Comments: 0

Digitally transforming how the electronics value chain is traversed will unlock the full innovative potential of system design companies all over the world. By augmenting desktop authoring tools with integrated, native cloud applications that seamlessly connect companies with the electronics value chain, design teams will be empowered to confidently deliver on aggressive requirements, schedules... » read more

Formal Verification Ensures The Perseverance Rover Lands Safely On Mars

By Joseph Hupcey III - 28 Apr, 2022 - Comments: 0

By Joe Hupcey III and Kevin Campbell Safely landing a spacecraft anywhere on Mars is a complex, high-risk challenge. Even worse, the most scientifically interesting areas of the planet are guarded by boulders, ditches, and tall cliffs — land formations that aren’t very welcoming to vehicles. Such was the case with the Mars Perseverance Rover's Landing Site: Jezero Crater. It’s not an e... » read more

The Value Of RF Harmonic Balance Analyses For Analog Verification

By Pradeep Thiagarajan - 24 Mar, 2022 - Comments: 0

By Pradeep Thiagarajan and Scott Guyton The world we live in is intricately connected by electronic systems that are expected to function flawlessly to satisfy consumer needs. Functionality violations beyond certain tolerance levels are frowned upon and negatively impact the quality level of products. These systems are required to function accurately, in tandem with other interdependent syst... » read more

Dissolving The Barriers In Multi-Substrate 3D-IC Assembly Design

By Tarek Ramadan - 24 Feb, 2022 - Comments: 0

Advanced packaging continues to promise improved form factor, cost, performance, and functionality compared to the traditional transistor scaling on SoCs. This is done by integrating multiple dies on top of a substrate (organic or silicon). Besides multiple dies, multiple substrates can typically exist in a 3D-IC assembly. In this case, the benefits of advanced packaging are taken to a whole ne... » read more

Dependable Verification Is The Foundation ICs Require

By Pirzad Motafram - 27 Jan, 2022 - Comments: 0

As our world becomes increasingly high-tech, it is easy to lose sight of the little things that make all of our fancy gadgets achieve optimal performance. The one thread that enables you to get all of the benefits of a new laptop, tablet, smartphone, or your automobile’s digital dashboard and connects the components that ensure best performance is the integrated circuit (IC). For as breath... » read more

EDA In The Cloud Is Driving Semiconductor Innovation

By Nebabie Kebebew - 22 Dec, 2021 - Comments: 0

In the past decade, the move towards cloud computing occurred primarily in sectors like finance, retail, and healthcare, with the emergence of leading public cloud vendors such as Amazon Web Services (AWS), Microsoft Azure, Google Cloud Platform, and others accelerating the trend. However, the chip design industry has been slower to adopt cloud computing. In the current highly competitive en... » read more

Improving Predictability Through Design Solutions Methodologies

By Rusty Stuber - 23 Nov, 2021 - Comments: 0

“Plans are useless, but planning is indispensable.” – Dwight D. Eisenhower Our first article called for the need to change how we think about verification. In this follow-up, we dive deeper into the tools needed for today’s verification. Project milestones are destined to move. Development estimates are rough and almost always optimistic. Each development stage contains interdepe... » read more

Debug Solutions For Designers Accelerate Time To Verification

By Neil Hand - 28 Oct, 2021 - Comments: 0

Complexity continues to explode as designs become larger and more complicated with more functionality and more aggressive expectations. The cost of doing business as usual, for the entire design and verification team, in turn, grows exponentially, in terms of time, effort, and dollars. Fig. 1: Discovering issues later than possible requires more effort to find and fix. (Source: Wilson Rese... » read more

Can We Efficiently Automate 2.5/3D IC ESD Protection Verification?

By Dina Medhat - 23 Sep, 2021 - Comments: 0

Protection against ESD events (commonly referred to as ESD robustness) is an extremely important aspect of integrated circuit (IC) design and verification, including 2.5/3D designs. ESD events cause severe damage to ICs due to a sudden and unexpected flow of electrical current between two electrically charged objects. This current may be caused by contact, an electrical short, or dielectric bre... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

NAND Flash Targets 1,000 Layers

New techniques go beyond improved deposition and etching, but challenges stack up, too.

by Bryon Moyer

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.