Accelerating The AI Economy Through Heterogeneous Integration


The world is rapidly transitioning from an internet economy to an AI economy. In the internet economy, we stayed constantly connected to the internet 24/7 through our smartphones, PCs, and IoT devices. However, in the AI economy, every aspect of our lives is interwoven with artificial intelligence. You may already be familiar with AI tools such as ChatGPT or Google Gemini, which answer question... » read more

Navigating Increased Complexity In Advanced Packaging


As chips evolve toward stacked, heterogeneous assemblies and adopt more complex materials, engineers are grappling with new and often less predictable sources of variation. This is redefining what it means to achieve precision, forcing companies to rethink everything from process control and in-line metrology to materials selection and multi-level testing. These assemblies are the result of ... » read more

Challenges In Powering Electrification With GaN And SiC


The wish list of device properties that designers of power management systems would like to have is lengthy, but no single material is yet sufficient for the full range of power control applications. For control transistors to handle power surges, breakdown voltages should be at least triple the expected operating voltage — 1.2 kilovolts or more for many electric vehicle applications, and ... » read more

EU Chips Act: A Game Changer For The Digital Economy


The global semiconductor landscape has undergone significant transformation in recent years. With disruptions such as the semiconductor supply chain crisis and the challenges it posed to the automotive sector, Europe’s dependence on external fabrication facilities, particularly in Taiwan, has become a pressing concern. In response, the European Union (EU) introduced the EU Chips Act, a compre... » read more

Takeaways From The 2024 SPIE Photomask Technology + EUV Conference


In the autumn, I had the opportunity to attend the 2024 SPIE Photomask Technology and EUV Lithography conferences, collectively referred to as PUV or sometimes BACUS, the latter a reference to the event’s early association with the BACUS organization. This is a key annual event that brings together experts and professionals in photomask technology and EUV lithography. This year’s conference... » read more

NAND Flash Targets 1,000 Layers


The chip industry is pushing to quadruple the stack height of 3D NAND flash from 200 layers to 800 layers or more over the next few years, using the additional capacity will help to feed the unending need for more memory of all types. Those additional layers will add new reliability issues a number of incremental reliability challenges, but the NAND flash industry has been steadily increasin... » read more

Analysis Of Multi-Chiplet Package Designs And Requirements For Production Test Simplification


In recent years there has been a sharp rise of multi-die system designs. Numerous publications targeting a large variety of applications exist in the public domain. One presentation [2] on the IEEE’s website does a good job of detailing the anecdotal path of multi-die systems by way of chiplet building blocks integrated within a single package [2]. The presentation includes references to a ha... » read more

HBM Options Increase As AI Demand Soars


High-bandwidth memory (HBM) sales are spiking as the amount of data that needs to be processed quickly by state-of-the-art AI accelerators, graphic processing units, and high-performance computing applications continues to explode. HBM inventories are sold out, driven by massive efforts and investments in developing and improving large language models such as ChatGPT. HBM is the memory of ch... » read more

Using Dummy Patterning To Solve Etch Uniformity Problems


Semiconductor devices are made up of hundreds of thin layers of materials stacked by multiple deposition and etch processes. Process engineers need to design the best combination of deposition and etch processes to ensure uniformity across an entire chip area and across the silicon wafer. Uniformity is the most common and critical parameter that is monitored in semiconductor fabrication, especi... » read more

Luminary Panel Sees Progress In EUV Pellicle Adoption As Critical For EUV


A significant focus of the 2024 SPIE Photomask and EUV conference was on EUV lithography and high-numerical-aperture (high-NA) EUV lithography, offering the potential to drive resolution to new heights. These EUV solutions bring new challenges such as pellicles, mask inspection, and smaller and smaller minimum mask dimensions. Progress has been impressive, according to lithography luminary Dr. ... » read more

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