New Approaches To Power Decoupling


Decoupling capacitors have long been an important aspect of maintaining a clean power source for integrated circuits, but with noise caused by rising clock frequencies, multiple power domains, and various types of advanced packaging, new approaches are needed. Power is a much more important factor than it used to be, especially in the era of AI. “Doing an AI search consumes 10X the power t... » read more

Reduce Augmented Reality Device Time-to-Market by Bringing Manufacturing Impact to Optical Simulation


Disruptive AR systems will push the limits of optics: limits in design, limits in manufacturing, and limits in overall system integration. The trend of optical components being integrated into more complex miniaturized systems is impacting optical software. Optical design software has been around for decades to design, simulate, and analyze any optical component from lenses and mirrors to light... » read more

Overview Of The Current State of the Development Of Curvilinear Masks


A technical paper titled "Curvilinear masks overview: manufacturable mask shapes are more reliably manufacturable" was published by researchers at D2S. The paper covers: The rationale for curvilinear masks The application of the curvilinear inverse lithography technology The state of readiness of the curvilinear mask-making infrastructure, including mask rule checking, metrology, ... » read more

The Growing Imperative Of Hardware Security Assurance In IP And SoC Design


In an era where technology permeates every aspect of our lives, the semiconductor industry serves as the backbone of innovation. From IoT devices to data centers, every piece of technology relies on integrated circuits (ICs) such as intellectual property (IP) cores and system on chips (SoCs). As these technologies become increasingly pervasive, the importance of hardware security assurance in t... » read more

Monolithic Vs. Heterogeneous Integration


Experts at the Table: Semiconductor Engineering sat down to discuss two very different paths forward for semiconductors and what's needed for each, with Jamie Schaeffer, vice president of product management at GlobalFoundries; Dechao Guo, director of advanced logic technology R&D at IBM; Dave Thompson, vice president at Intel; Mustafa Badaroglu, principal engineer at Qualcomm; and Thomas Po... » read more

Americas Chip Funding Energizes Industry


This is the second in a series of articles tracking government chip investments. See part one here (global),  part 3 covering EMEA is here and Asia here. Since the first announcement of a non-binding preliminary memorandum of terms with BAE Systems in December 2023, the U.S. Department of Commerce has rolled out comprehensive plans to support more than a dozen companies in order to shore up... » read more

Government Chip Funding Spreads Globally


This is the first in a series of articles tracking government chip investments. See part two for Americas-focused funding and part three for the UK and EMEA, and part four for Asia. Countries around the world are ramping up investments into their semiconductor industries as part of new or existing approaches. The increased government activity stems from growing awareness of the strategic imp... » read more

Preparing For Ferroelectric Devices


The discovery of ferroelectricity in materials that are compatible with integrated circuit manufacturing has sparked a wave of interest in ferroelectric devices. Ferroelectrics are materials with a permanent polarization, the direction of which can be switched by an applied field. This polarization can be used to raise or lower the threshold voltage of a transistor, as in FeFETs, or it can c... » read more

Emerging Technologies Driving Heterogeneous Integration


As chips are disaggregated into chiplets, more features are being added into these devices that chipmakers were unable to include in the past due to reticle size limits and the high cost of scaling everything to the latest process node. This has opened the door to new architectures, new materials such as glass substrates, and a variety of new challenges. Dick Otte, president and CEO of Promex I... » read more

Optimizing Wafer Edge Processes For Chip Stacking


Stacking chiplets vertically using short and direct wafer-to-wafer bonds can reduce signal delay to negligible levels, enabling smaller, thinner packages with faster memory/processor speeds and lower power consumption. The race is on to implement wafer stacking and die-to-wafer hybrid bonding, now considered essential for stacking logic and memory, 3D NAND, and possibly multi-layer DRAM stac... » read more

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