Democratizing Roots of Trust from Silicon to Software

By Synopsys - 07 Nov, 2024 - Comments: 0

With a vast amount of devices getting connected to the Internet of Things (IoT) and the growing number of low-cost attacks being developed to hack such IoT devices, it is clear that the need for embedded security solutions is rising dramatically. A security subsystem in the main system-on-chip (SoC) of a device can be deployed to offer secure cryptographic services to the applications running o... » read more

Power Module Design for Electric Vehicles – Addressing Reliability and Safety

By Cadence - 07 Nov, 2024 - Comments: 0

This report presents an integrated approach to the efficient design of power modules used in electric vehicles and other high-power systems. The proposed flow enables the design of power modules for safety and reliability, co-optimizing die and package and obtaining power modules with reliable thermal performance at the design frequency and operating temperature. By incorporating a “shift lef... » read more

Increasing Design Flexibility With RISC-V-Based Processor IP

By Rich Collins - 21 Oct, 2024 - Comments: 0

The semiconductor industry increasingly needs more flexible and scalable processor architectures, driving the growing adoption of RISC-V. Originally developed at the University of California, Berkeley, the open-source RISC-V instruction set architecture (ISA) has become very popular in recent years. RISC-V allows designers to customize their processor implementations to meet the specific needs ... » read more

LLMs Show Promise In Secure IC Design

By Adam Kovac - 21 Oct, 2024 - Comments: 0

The introduction of large language models into the EDA flow could significantly reduce the time, effort, and cost of designing secure chips and systems, but they also could open the door to more sophisticated attacks. It's still early days for the use of LLMs in chip and system design. The technology is just beginning to be implemented, and there are numerous technical challenges that must b... » read more

Confidential Computing: A Key To Secure Cloud And Edge Environments

By Raj Uppala - 10 Oct, 2024 - Comments: 0

Historically, data security was primarily focused on safeguarding data residing within systems controlled by the users themselves, such as on-premise storage and server infrastructure. In such a siloed environment, information stored on the storage media, Data-at-Rest, was encrypted to ensure security. Data-in-Motion (aka Data-in-Transit) was safeguarded by encrypting it before transmitting it ... » read more

Partial Header Encryption In Integrity And Data Encryption For PCIe

By Kunal Chhabriya - 10 Oct, 2024 - Comments: 0

Partial Header Encryption (PHE) is an additional mechanism added to Integrity and Data Encryption (IDE) in PCIe 6.0 to prevent side-channel attacks based on attacker analysis of the information included in the headers. This blog narrates PHE flow and Cadence VIP support for PHE in IDE across PCIe/CXL protocols. Background Introducing PCIe's Integrity and Data Encryption Feature is an excell... » read more

CMA/SPDM—An Additional Layer of Security for PCIe Transport

By Suprio Biswas - 10 Oct, 2024 - Comments: 0

In today’s data-driven world, everyone is navigating a vast ocean of information that transcends across unsecured links and can easily fall prey to digital hackers. To keep our data safe, it is crucial to beef up security and make sure that only the right users can access our data. This article dives into the world of secure communication, where component measurement and authentication (CM... » read more

Security Concerns Weigh Down Open-Source EDA

By Adam Kovac - 10 Oct, 2024 - Comments: 0

Open-source EDA tools are free, readily available, and growing in numbers, but many chipmakers are wary of using them due to security concerns. On the plus side, proponents say these tools can help attract fresh new talent to chip design. Yet despite their spread online — GitHub alone has more than 140 EDA-specific repositories — using visible source code can provide new avenues of attac... » read more

Sustainable Rail Transportation With High Power SiC Modules: Part 2

By Diana Car - 10 Oct, 2024 - Comments: 0

In the first part of this blog, we had a look at how energy-efficient high-power modules contribute to the decarbonization of railway transportation. This part will focus on the future of traction: high-power silicon carbide modules, their key features, and the multiple system benefits they enable. Silicon carbide power modules and hybrid-propulsion trains: It’s a match! As we inch toward... » read more

Challenges In Reducing Wireless Latency

By Karen Heyman - 10 Oct, 2024 - Comments: 0

A new and much faster version of Wi-Fi is beginning to infiltrate the IoT market, reducing latency that has begun to creep up as more data is generated, processed, and moved wirelessly from one device to another. An estimated 20 billion connected devices are currently in use. Over the next several years, devices will start to include faster wireless connectivity, enabling more rapid transfer... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?

by Brian Bailey

Why Small Fab And Assembly Houses Are Thriving

Megafabs churning out the most advanced processors are not the only game in town.

by Bryon Moyer

category: IoT and Security

category: IoT, Security & Automotive