L31 Embedded Core Extensions For Wireless And Connectivity


5G is the latest generation of cellular networks using the 3rd Generation Partnership Project (3GPP) 5G New Radio air interface. Unlike previous generations of network (2G, 3G & 4G), which had a one-size-fits-all approach, 5G aims to address a wide range of very different applications. To flexibly support diverse quality of service requirements, network slicing is introduced to enable multip... » read more

Reduce BOM Costs And Development Efforts for EtherCAT and Other Industrial Ethernet-Compatible Servo Systems


EtherCAT and other industrial Ethernet systems are expanding into fields beyond factory networks. On the other hand, the conventional implementation style of industrial Ethernet introduces the issue of rising BOM costs due to an increase in the number of required components. Moreover, supporting multiple industrial Ethernet protocols require more reusable software other than industrial Ethernet... » read more

CEO Outlook: Chiplets, Data Management, And Reliability


Semiconductor Engineering sat down to talk about changes in chip design with Joseph Sawicki, executive vice president for IC EDA at Siemens Digital Industries Software; John Kibarian, president and CEO of PDF Solutions; John Lee, general manager and vice president of Ansys' Semiconductor Business Unit; Niels Faché, vice president and general manager of PathWave Software Solutions at Keysight; ... » read more

Blog Review: June 14


Synopsys' Richard Solomon and Gary Ruggles examine the Compute Express Link (CXL) protocol and how it could unlock new ways of doing computing such as enabling efficient heterogeneous computing architectures, accelerating data-intensive workloads, and facilitating advanced real-time analytics. Cadence's Andre Baguenie explains how to convert an electrical signal to a logic value using the Ve... » read more

Mitigating Voltage Droop


Voltage droop, also known as IR drop, is a phenomenon that occurs when the current in the power delivery network abruptly changes due to workload fluctuations. This can lead to supply voltage drops across system-on-chips (SoCs) which can cause severe performance degradation, limit their energy efficiency, and in extreme cases can cause catastrophic timing failures. To avoid these issues, conven... » read more

Week In Review: Design, Low Power


Renesas Electronics completed its acquisition of Panthronics, a fabless company specializing in near-field communication (NFC) wireless products. Renesas has already incorporated Panthronics NFC technology into several solution reference designs for applications such as payment, IoT, asset tracking, and smart meters. The European Commission announced new funding for the semiconductor and mic... » read more

Blog Review: June 7


Synopsys' Kenneth Larsen and Powerchip's S.Z. Chang explore wafer-on-wafer (WoW) and chip-on-wafer (CoW), 3D hybrid bonding schemes that can be used to stack memory on logic with shorter signal transmission distance at no wasted power and more interconnect and bandwidth density. In a podcast, Siemens' Conor Peick, Nand Kochhar, and Mark Sampson chat about how companies can address growing co... » read more

Week In Review: Design, Low Power


Arm debuted its latest platform for mobile computing. Arm Total Compute Solutions 2023 adds the new Immortalis-G720 GPU based on the 5th Generation GPU architecture, which redefines parts of the graphics pipeline to reduce memory bandwidth for the next generation of high geometry games and real-time 3D applications. The company also added two new Mali GPUs. In addition, Arm introduced a cluster... » read more

Blog Review: May 31


Cadence's Moshik Rubin looks at how the Portable Test and Stimulus Standard (PSS) is finding new use cases in ATE production test by enabling creation of a rich set of functional test scenarios in a reusable way. Synopsys' LJ Chen and Dana Neustadter check out the latest version of the Universal Flash Storage (UFS) standard, which doubles the data transfer rate of the preceding UFS 3.1 solut... » read more

Software-Defined Hardware Architectures


Hardware/software co-design has been a goal for several decades, but success has been limited. More recently, progress has been made in optimizing a processor as well as the addition of accelerators for a given software workload. While those two techniques can produce incredible gains, it is not enough. With increasing demands being placed on all types of processing, single-processor solutio... » read more

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