category: System-Level Design

category: IoT, Security & Automotive

Blog Review: Feb. 2
By Jesse Allen - 02 Feb, 2022 - Comments: 0

Synopsys' Stelios Diamantidis shares some predictions for AI in 2022, including the three markets that will push new AI chips, the increasing need for trust chains, the entry of non-traditional companies, and the impact of AI in chip design. Siemens EDA's Ray Salemi checks out how Python and SystemVerilog can work together to boost the verification ecosystem by taking advantage of what each ... » read more

Week In Review: Design, Low Power
By Jesse Allen - 28 Jan, 2022 - Comments: 0

Kalray, a provider of programmable data processing and storage acceleration cards for data centers, will acquire Arcapix Holdings, which provides software-defined storage and data management solutions for data-intensive applications. "I am delighted at the prospect of this acquisition that will accelerate our go-to-market and strengthen our key position in the data-intensive storage market. It ... » read more

A New Dimension Of Complexity For IC Design
By Ann Mutschler - 27 Jan, 2022 - Comments: 0

Full 3D designs involving logic-on-logic are still in the tire-kicking stage, but gaps in the tooling already are showing up. This is especially evident with static timing analysis (STA), which is used to validate a design’s timing performance by checking all possible paths for timing violations. STA issues began popping up particularly with the introduction of hybrid bonding, a bumpless p... » read more

Growth Spurred By Negatives
By Brian Bailey - 27 Jan, 2022 - Comments: 0

The success and health of the semiconductor industry is driven by the insatiable appetite for increasingly complex devices that impact every aspect of our lives. The number of design starts for the chips used in those devices drives the EDA industry. But at no point in history have there been as many market segments driving innovation as there are today. Moreover, there is no indication this... » read more

Ethical Coverage
By Brian Bailey - 27 Jan, 2022 - Comments: 1

How many times have you heard statements such as, "The verification task quadruples when the design size doubles?" The implication is that every register bit that is created has doubled the state space of the design. It gives the impression that complete verification is hopeless, and because of that little progress has been made in coming up with real coverage metrics. When constrained rando... » read more

Three Technologies Enabling The Next Decade Of Hyperconnectivity
By Frank Schirrmeister - 27 Jan, 2022 - Comments: 0

As it has become a tradition in my 15 years of blogging, January is a month of both reflection and outlook. At the beginning of 2022, I am excited that key themes from 5 and 10 years ago—3D integration, artificial intelligence and machine learning (AI/ML), and ubiquitous needs for more connectivity driving 4G and 5G networks—clearly have exceeded expectations and forecasts from that time. L... » read more

Greener Design Verification
By Brian Bailey - 27 Jan, 2022 - Comments: 0

Chip designs are optimized for lower cost, better performance, or lower power. The same cannot be said about verification, where today very little effort is spent on reducing execution cost, run time, or power consumption. Admittedly, one is a per unit cost while the other is a development cost, but could the industry be doing more to make development greener? It can take days for regression... » read more

Using Symbolic Simulation For SRAM Redundancy Repair Verification
By Hari Sathianathan - 27 Jan, 2022 - Comments: 0

Innovations in Very Deep Sub-Micron technologies, such as the advent of three-dimensional FinFET transistor structures, have facilitated the implementation of very large embedded SRAM memories in System-on-Chip (SoC) designs to the point where they occupy the majority of the chip die area. To get maximum memory capacity on the smallest die area, SRAM bitcells are designed with the minimum possi... » read more

Dependable Verification Is The Foundation ICs Require
By Pirzad Motafram - 27 Jan, 2022 - Comments: 0

As our world becomes increasingly high-tech, it is easy to lose sight of the little things that make all of our fancy gadgets achieve optimal performance. The one thread that enables you to get all of the benefits of a new laptop, tablet, smartphone, or your automobile’s digital dashboard and connects the components that ensure best performance is the integrated circuit (IC). For as breath... » read more

Veloce Coverage App And Veloce Assertion App Deliver Unified Coverage Methodology
By Siemens EDA - 26 Jan, 2022 - Comments: 0

The interoperability of the Veloce Coverage app and the Veloce Assertion app with other verification engines (simulation and formal) enables merging coverage collected by each engine and provides a cohesive coverage closure report and analysis flow. It enables the verification team and product-level management to make important decisions such as coverage closure sign-off, test quality analysis ... » read more

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