category: Top Stories

category: IoT, Security & Automotive

How Far Will Copper Interconnects Scale?
By Laura Peters - 15 Dec, 2022 - Comments: 0

As leading chipmakers continue to scale finFETs — and soon nanosheet transistors — to ever-tighter pitches, the smallest metal lines eventually will become untenable using copper with its liner and barrier metals. What comes next, and when, is still to be determined. There are multiple options being explored, each with its own set of tradeoffs. Ever since IBM introduced the industry to c... » read more

Ferroelectrics: The Dream Of Negative Capacitance
By Katherine Derbyshire - 15 Dec, 2022 - Comments: 0

Ferroelectrics are getting a serious re-examination, as chipmakers look for new options to maintain drive current. Ferroelectric materials can provide non-volatile memory, serving an important functional gap somewhere between DRAM and flash memory. Indeed, ferroelectrics for memory and 2D channels for transistors were two highlights of the recent IEEE Electron Device Meeting. Ferroelectri... » read more

The March Toward Chiplets
By Ed Sperling and Karen Heyman - 15 Dec, 2022 - Comments: 0

The days of monolithic chips developed at the most advanced process nodes are rapidly dwindling. Nearly everyone working at the leading edge of design is looking toward some type of advanced packaging using discrete heterogeneous components. The challenge now is how to shift the whole chip industry into this disaggregated model. It's going to take time, effort, as well as a substantial reali... » read more

Making Chips Yield Faster At Leading-Edge Nodes
By Ed Sperling - 30 Nov, 2022 - Comments: 0

Simulation for semiconductor manufacturing is heating up, particularly at the most advanced nodes where data needs to be analyzed in the context of factors such as variation and defectivity rates. Semiconductor Engineering sat down with David Fried, corporate vice president of computational products at Lam Research, to talk about what's behind Lam's recent acquisition of Esgee Technologies, ... » read more

Challenges In Backside Power Delivery
By Laura Peters - 17 Nov, 2022 - Comments: 0

One of the key technologies to enable scaling below 3nm involves delivering of power on the backside of a chip. This novel approach enhances signal integrity and reduces routing congestion, but it also creates some new challenges for which today there are no simple solutions. Backside power delivery (BPD) eliminates the need to share interconnect resources between signal and power lines on t... » read more

Hot Trends In Semiconductor Thermal Management
By Karen Heyman - 17 Nov, 2022 - Comments: 1

Increasing thermal challenges, as the industry moves into 3D packaging and continues to scale digital logic, are pushing the limits of R&D. The basic physics of having too much heat trapped in too small a space is leading to tangible problems, like consumer products that are too hot to hold. Far worse, however, is the loss of power and reliability, as overheated DRAM has to continually r... » read more

Where All The Semiconductor Investments Are Going
By Ed Sperling - 17 Nov, 2022 - Comments: 2

Companies and countries are funneling huge sums of money into semiconductor manufacturing, materials, and research — at least a half-trillion dollars over the next decade, and maybe much more — to guarantee a steady supply of chips and know-how to support growth across a wide swath of increasingly data-centric industries. The build-out of a duplicate supply chain that can guarantee capac... » read more

Which Foundry Is In The Lead? It Depends.
By Ed Sperling - 26 Oct, 2022 - Comments: 2

The multi-billion-dollar race for foundry leadership is becoming more convoluted and complex, making it difficult to determine which company is in the lead at any time because there are so many factors that need to be weighed. This largely is a reflection of changes in the customer base at the leading edge and the push toward domain-specific designs. In the past, companies like Apple, Google... » read more

SiPs: The Best Things in Small Packages
By Laura Peters - 20 Oct, 2022 - Comments: 0

System-in-package (SiP) is quickly emerging as the package option of choice for a growing number of applications and markets, setting off a frenzy of activity around new materials, methodologies, and processes. SiP is an essential packaging platform that integrates multiple functionalities onto a single substrate, which enables lower system cost, design flexibility, and superior electrical p... » read more

Wafer Cleaning Becomes Key Challenge In Manufacturing 3D Structures
By Adele Hars - 20 Oct, 2022 - Comments: 0

Wafer cleaning, once a rather mundane task as simple as dipping wafers in cleaning fluid, is emerging as one of the top major engineering challenges for manufacturing GAA FETs and 3D-ICs. With these new 3D structures — some on the horizon but some already in high-volume manufacturing — semiconductor wafer equipment and materials suppliers in the wet cleaning business are at the epicenter... » read more

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