Fan-Outs vs. TSVs


Two years ago, at the annual IMAPS conference on 2.5D and 3D chip packaging, the presentations were dominated by talk of fan-out wafer-level packaging. There was almost no talk of through-silicon vias, which previously had been heralded as vital to 2.5D and 3DIC packaging. Fast forward to this month's 3D Architectures for Heterogeneous Integration and Packaging conference in Burlingame, Cali... » read more

Changes Ahead For Test


Testing microprocessors is becoming more difficult and more time consuming as these devices are designed to take on more complex tasks, such as accelerating artificial intelligence computing, enabling automated driving, and supporting deep neural networks. This is not just limited to microprocessors, either. Graphics processing units are grabbing market share in supercomputing and other area... » read more

Shortages Hit Packaging Biz


Rising demand for chips is hitting the IC packaging supply chain, causing shortages of select manufacturing capacity, various package types, leadframes and even some equipment. Spot shortages for some IC packages began showing up earlier this year, but the problem has been growing and spreading since then. Supply imbalances reached a boiling point in the third and fourth quarters of this yea... » read more

3D Neuromorphic Architectures


Matrix multiplication is a critical operation in conventional neural networks. Each node of the network receives an input signal, multiplies it by some predetermined weight, and passes the result to the next layer of nodes. While the nature of the signal, the method used to determine the weights, and the desired result will all depend on the specific application, the computational task is simpl... » read more

Litho Options For Panel Fan-out


Several packaging houses are inching closer to production of panel-level fan-out packaging, a next-generation technology that promises to reduce the cost of today’s fan-out packages. In fact, ASE, Nepes, Samsung and others already have installed the equipment in their panel-level fan-out lines with production slated for 2018 or so. But behind the scenes, panel-level packaging houses contin... » read more

Chiplets Gaining Steam


Building chips from pre-verified chiplets is beginning to gain traction as a way of cutting costs and reducing time to market for heterogeneous designs. The chiplet concept has been on the drawing board for some time, but it has been viewed more as a possible future direction than a necessary solution. That perception is beginning to change as complexity rises, particularly at advanced nodes... » read more

Where MEMS Can Boldly Go Now


MEMS chips are being designed to go into the human body as biosensors, which will require unique packaging. And as demand grows for assisted and automated driving, MEMS devices also are finding new use cases in automotive electronics, their chief market segment prior to the millennium. Pressure sensors, such as those that monitor the air pressure in tires, remain the biggest type of [getkc i... » read more

Memory Test Challenges, Opportunities


The semiconductor capital equipment market is on fire, and the memory chip test equipment sector is no different. But it is getting much more difficult on the memory side. Memory test vendors are contending with next-generation devices, such as 3D NAND flash memories, HBM2 chips, low-power double-data-rate DRAMs, graphics DRAMs, phase-change memories, magnetoresistive RAMs, and resistive RAM... » read more

Improving Yield, Reliability With Data


Big data techniques for sorting through massive amounts of data to identify aberrations are beginning to find a home in semiconductor manufacturing, fueled by new requirements in safety-critical markets such as automotive as well as the rising price of packaged chips in smartphones. Outlier detection—the process of finding data points outside the normal distribution—isn't a new idea. It ... » read more

Toward System-Level Test


The push toward more complex integration in chips, advanced packaging, and the use of those chips for new applications is turning the test world upside down. Most people think of test as a single operation that is performed during manufacturing. In reality it is a portfolio of separate operations, and the number of tests required is growing as designs become more heterogeneous and as they ar... » read more

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