Shortages Hit Packaging Biz

Unexpected spike in IC demand is spilling over into the packaging supply chain.

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Rising demand for chips is hitting the IC packaging supply chain, causing shortages of select manufacturing capacity, various package types, leadframes and even some equipment.

Spot shortages for some IC packages began showing up earlier this year, but the problem has been growing and spreading since then. Supply imbalances reached a boiling point in the third and fourth quarters of this year, and it now appears that packaging customers may encounter select shortages well into 2018.

There are several reasons for this. IC demand was greater than expected in 2017, so customers required more IC packaging capacity. But packaging houses are running at full capacity, unable to meet the demand for many but not all package types.

Besides IC packages, other types of products are also in short supply in what some call a boom or super cycle in the electronics sector. “Is it really a super cycle or what I call an intrinsic expansion that we have never seen before,” said Tien Wu, chief operating officer at Advanced Semiconductor Engineering (ASE), the world’s largest outsourced semiconductor assembly and test (OSAT) vendor. “In this super cycle, we are constrained in many sectors, including memory, OLED, passive, leadframe, and there are many others I can talk about. Even on the equipment side, (such as) chip bonders, we are having delivery issues. So in this round, not only is the supply constrained, but the demand is (strong) for a long sustainable time.”

Most component shortage situations are simple by comparison. For example, Apple and Samsung are gobbling up the world’s supply of OLED screens for their smartphones. And in DRAMs, suppliers have been reluctant to add capacity despite rising demand. Then, in NAND, vendors are making a transition from planar NAND to 3D NAND, causing shortages of both product types.

The issues within IC packaging are more complex and involve several markets. Here are the bigger issues in the arena:

• Factory utilization rates are high across the board in the IC packaging industry, but there is a major shortfall of worldwide 200mm wafer bumping capacity. In wafer bumping, solder balls or copper pillars are formed on a wafer, which provide the electrical interconnects between a die and a substrate.
• The shortfall of 200mm bumping capacity impacts the supply of select products, namely chip-scale packages (CSPs) and RF front-end modules for smartphones.
• Then, for other reasons, quad-flat no-lead (QFN) packages and wafer-level packages are in high demand or in tight supply.
• Demand for QFN has resulted in longer lead times for leadframes, the key component used for this package type. And then, demand for packaging equipment is stronger than expected.

Not every package type is in short supply. But in general, demand has been robust for OSATs throughout 2017 and heading into 2018. “Everybody’s factories are pretty full,” said Jan Vardaman, president of TechSearch International. “This is the period in the industry where we do see higher utilization.”

But needless to say, shortages impact the delivery schedules for packaging customers. “It also impacts people trying to get products out the door. So it could hurt some people’s revenue if their supply is constrained,” Vardaman said. “The big question is, how long will it last? I don’t think anybody has a good answer for that.”

These trends are worrisome for customers. OSATs, which provide IC packaging and test outsourcing services, are under stress. They have been under-capitalized over the years and most vendors don’t have the resources to meet every requirement for a demanding customer base.

To help the industry gain an insight into the business, Semiconductor Engineering has taken a look at the main shortage issues in the sector, such as bumping capacity, package types, leadframes and equipment.

Bumping shortages
The current boom cycle took the industry by surprise in 2017. For example, in late 2016, the World Semiconductor Trade Statistics (WSTS) group projected that the IC industry would grow a modest 3% in 2017 over 2016. Over the year, though, the WSTS has raised its IC forecast on several occasions due to a surge in DRAMs and 3D NAND. In its most recent forecast, the organization predicts that the semiconductor market will reach $409 billion in 2017, up 20.6% over 2016. In 2018, the IC industry will grow 7%, according to the WSTS.

The IC packaging supply chain reflects the demand picture in the chip industry. In the current cycle, packaging houses saw the traditional growth patterns in the first half of 2017.

But in the third and fourth quarters of this year, OSATs began to see greater than expected demand in several segments. “Mobile is, of course, there,” said Vinayak Pandey, vice president of product and technology marketing at STATS ChipPAC. “We are seeing demand beyond mobile. Automotive and networking are some new areas of demand that we are seeing now.”

The demand caused a spike in orders at the OSATs. On average, the factory utilization rates among the OSATs are at 80% and above right now, although many technologies are running at full capacity. “OSATs are running full,” Pandey said. “(With) any additional demand, lead times are getting longer.”

While capacity is tight on several fronts, the industry’s biggest bottleneck is arguably a mature manufacturing process called wafer bumping, especially in the 200mm arena. As part of a wide array of offerings, Amkor, ASE, STATS ChipPAC and others provide wafer bumping services.

Offered as part of a turnkey service, wafer bumping is conducted on 200mm or 300mm wafers. Bumping is not a packaging type per se, but rather it’s a manufacturing process that forms tiny solder balls or copper pillars on a wafer.


Fig. 1: Common bumping techniques. Source: Semitracks

With bumping, OSATs can develop various package types, such as CSPs, fan-out and flip-chip BGA. CSPs, fan-in and fan-out all fall into a category called wafer-level packaging (WLP). WLP involves a process of packaging an IC while it’s still on the wafer.


Fig. 2: Traditional vs. wafer-level packaging flow. Source: Lam Research

Flip-chip is an interconnect scheme rather than a type of packaging. Flip-chip is used for application processors, graphics chips and microprocessors.

In flip chip, tiny bumps or copper pillars are formed on a die. The device is flipped and mounted on a separate die or board. The die or board consists of copper pads. The bumps or pillars land on the copper pads, forming an electrical connection.


Fig 3: Flip-chip BGA package. Source: UTAC

Regardless, OSATs have enough 300mm bumping capacity in place. Surprisingly, though, there is an acute shortage of more mature 200mm bumping capacity in the market.

There are several reasons for this shortfall. For some time, the IC industry has seen an enormous demand for chips made on 200mm wafers, causing an acute shortage of 200mm fab capacity.

The explosion of 200mm business has trickled down the supply chain and impacted the OSATs. But the shortfall in 200mm bumping capacity is mainly due to enormous demand from the analog and RF communities. “Higher demand for 200mm is being driven by RF front-end modules requiring more bumped silicon as well as more product migrating to WLCSP from other package types,” said Kevin Engel, senior vice president of bump services at Amkor.

In fact, the 200mm bumping shortfall is causing a tight supply, if not shortages, for CSPs and RF front-end modules. RF front-end modules consist of the key RF components used in mobile phones.


Fig. 4: Standard CSP. Source: STATS ChipPAC.

Analog/RF chipmakers are scrambling for 200mm bumping capacity for good reason. Previously, in packaging, these vendors have used a traditional technology called ball drop. This involves a process of forming solder balls on the I/Os of a wafer. The balls range from 150μm to 200μm.


Fig. 5: Ball drop process. Source: Semitracks

“As you reduce the pitch, you need to reduce the size of the balls. The ball size can’t be reduced beyond a certain number,” STATS ChipPAC’s Pandey said. “So all of the analog guys want to shrink their die and put more I/Os (on the device). All of a sudden, they need a smaller bump. You can’t use ball drop anymore.”

As a result, many analog/RF chipmakers are migrating from ball drop towards a plated bumping process. This enables bumps with smaller pitches, but it requires more process steps such as electroplating. Plating is a deposition step that enables the copper metallization schemes in IC packages.


Fig. 6: Plated bump process. Source: Semitracks

“The challenge is that while ball drop is a fairly fast process, plating is not a fast process,” Pandey said. “It takes time. So, the capacity challenges are happening because there is a transition from ball drop to plated bump.”

Going forward, 200mm bumping capacity is expected to be in short supply for some time. OSATs have been reluctant to add 200mm capacity in the past, but some are changing course and plan to add more production in 2018.

Then, in 2019, analog/RF chipmakers may migrate from plated bumping to copper pillar bumping. Many of today’s digital chips use copper pillar bumping, meaning that there could be a mad scramble for this technology in the future.

Packaging shortages
Meanwhile, as stated above, there is a tight supply of CSPs and RF modules in the market. Other packaging types are also in high demand. “Strong growth for wafer-level packages continue,” TechSearch’s Vardaman said. “We’ve also seen growth in system-in-package. We’ve seen growth in packaging for the automotive sector.”

Demand is strong for WLP, such as fan-in and fan-out. “Wafer-level packaging is in a similar situation as bump,” Amkor’s Engel said. “Overall capacity for 200mm and 300mm in the industry is tight. This is starting to soften a little, but will peak again in 2018. That will be challenging.”

Most of the demand revolves around legacy fan-out packages, namely embedded wafer-level BGA (eWLB). Next-generation, high-density fan-out packages also are ramping up. TSMC’s fan-out technology has been adopted by Apple. ASE, Amkor, STATS ChipPAC and others are shipping next-generation fan-out.

And surprisingly, QFN—an older but reliable package type—is also hot. Infineon, NXP, Microchip, Silicon Labs, STMicroelectronics and TI are the big drivers of QFN, according to analysts.

QFN and quad flat-pack (QFP) belong in the leadframe group of package types. A leadframe is a metal frame that consists of package leads and the frame. A die is attached to the frame. The leads are connected to the die using thin wires.


Fig. 7: QFN package. Source: Wikipedia

“The cheapest package available today is QFN,” STATS ChipPAC’s Pandey said. “QFN is the best combination of a cheap package, but it still allows you do some routing.”

QFN is driven by two markets—automotive and the Internet of Things (IoT). “We are now starting to see that QFNs are going haywire,” he said. “Everywhere, there is QFN demand.”

At the same time, Samsung is also jumping on QFN for its latest smartphones, according to multiple sources. Previously, Samsung used more WLPs than QFNs in its smartphones, sources said. But after various issues with its last smartphones, the company has reversed course and is now using more QFNs than WLPs in an effort to ensure the reliability of its phones, analysts said.

In contrast, Apple is using more WLPs in its latest smartphones, including both fan-in and fan-out packages.

Demand for QFN, meanwhile, is impacting the supply of components used to make these packages, namely leadframes. “QFN demand has been strong, but manageable,” said Prasad Dhond, senior director of leadframe products at Amkor. “For other products, leadframe supply from some suppliers has been tight since Q1 2017. Leadframes using particular roughening treatments have suffered long lead times due to capacity shortages. Other leadframe suppliers have pushed out lead times due to copper raw material shortages.”


Fig: 8: Leadframe examples (L-R), precision stamping, quality plating, photo etching. Source: Mitsui

Leadframe woes
To be sure, the leadframe business is undergoing some changes. Today, there are 40 or so leadframe suppliers in the market, including a number of smaller vendors with revenues in the $10 million to $40 million range, according to SEMI. The larger leadframe suppliers include ASM Pacific Technology, Chang Wah, Haesung DS, Mitsui, Shinko and SDI.

In total, leadframe units for IC packages are expected to increase 10% in 2017 over 2016, according to SEMI. “It is probably safe to say that leadframe units should increase in the low- to mid-single-digit range in 2018,” said Dan Tracy, an analyst at SEMI.

The leadframe business is a low-margin segment that is going through some turbulent times. Here are just some of the recent events in the industry:

• In 2016, Sumitomo Metal Mining, the world’s largest leadframe supplier, exited this business due to shrinking margins and stiff competition from China. Last year, Taiwan’s Chang Wah acquired the mainstream leadframe products from Sumitomo. Another Taiwan supplier, Jih Lin, bought the power semi leadframe unit from Sumitomo.
• In 2017, leadframe vendors have been unable to secure enough copper alloy materials used to make leadframes for IC packages.
• Then, Hitachi, Kobi, Mitsubishi and other copper alloy suppliers have diverted a large percentage of their production from leadframes to higher margin connector products.

All told, leadframe vendors and their customers face some challenges. “There are supply issues with copper alloys for leadframes,” SEMI’s Tracy said. “So leadframe makers and their customers are facing longer lead times.”

Leadframe suppliers require a large amount of copper alloy material to make leadframes for IC packages. Recently, though, OSATs have seen strong demand for fine-pitch QFN packages, which require less copper. “Generally speaking, the amount of copper alloy consumed for semiconductor packaging has been declining,” Tracy said. “While overall leadframe units are still growing, the trend towards the smaller, thinner QFN has resulted in less copper alloy being consumed.”

With those issues in mind, suppliers of leadframes have been under stress in 2017. “From the end of 2016, we saw the (leadframe) market pick up. When we moved to Q2 2017, then we saw that the market demand was suddenly changing very fast,” said Stanley Tsui, group chief operating officer and executive vice president of ASM Pacific Technology, a supplier of equipment, leadframes and other products. Tsui is also chief executive of ASM Pacific Technology’s Material Business Segment group.

At about that time, copper suppliers began to shift more of their production from leadframes to connectors, causing lead times to stretch out. “Because of that move, it made the whole supply chain very tight,” Tsui said. “(The industry began to) fight for raw copper capacity allocation.”

Traditionally, leadframe lead times are three to four weeks. By mid-2017, though, the average lead times were roughly 10 to 12 weeks, according to analysts, which caused “panic buying” in the market.

“In Q2 and the beginning of Q3, our lead times were shooting up to about 12 to 16 weeks. Some were 20 weeks. That was for a unique process,” Tsui said. “When we moved into Q4, the market calmed down a bit. Now, we are back to 6 or 8 week levels. Some are 4 to 6 weeks.”

Right now, the leadframe market is a mixed bag. “We would say the demand for leadframes is getting higher than before due to automobile applications,” said Kenji Okuma, legal group manager for Mitsui High-tec, in an e-mail exchange. Mitsui, now the world’s largest leadframe vendor, makes various leadframes, including ultra-fine pitch products for various applications.

“In general, there is a tight situation (for leadframes),” said James Cheng, associate vice president for the marketing and sales division at SDI, a supplier of leadframes and other products.

The bigger problem, according to Cheng and others, is the supply of copper alloy. In fact, the lead times for copper alloy from suppliers are 40 to 50 days for leadframe customers and 30 to 40 days for connector vendors, according to SEMI.

Suppliers from Japan and Germany produce higher quality copper materials, but those products are “very tight and difficult to get,” Cheng said. “They have longer lead times. In the meantime, (suppliers) also increased the price.”

China also produces copper alloy. While Chinese suppliers have ample capacity, the quality is sometimes sub-standard. “The low-end copper suppliers in China cannot reach a certain quality requirement,” he said.

Equipment outlook
Besides certain package types and leadframes, OSATs also worry about the delivery times of the equipment used to make IC packages.

The lead times for some equipment are stretching out, while others are normal or within reason. For example, Kulicke & Soffa, the world’s largest supplier of wirebonders, recently quoted five week delivery times for wirebonders, which is two weeks longer than normal, according to company officials.

K&S, though, has seen a spike in orders for wedge bonders, which are used for power ICs. Lead times for sputtering equipment and other systems are stretching out, however.

Still, the question is clear—How will 2018 play out? It’s difficult to predict the future, but shortages in the packaging supply chain are expected to linger, at least for the first part of 2018.

For now, vendors are taking a wait and see approach. “I see a cool down period before the next wave,” ASM Pacific Technology’s Tsui said. “(So, the industry will) have time to calm down a little bit to digest the inventory. Then, we will wait for the next move.”

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  • James Nichols

    Great article with good points. However, you might not be aware there is 200mm wafer bumping capacity available in the US from International Micro Industries, Inc. (IMI).