category: Top Stories

category: IoT, Security & Automotive

Electric Cars Gain Traction, But Challenges Remain
By Mark LaPedus - 22 Apr, 2019 - Comments: 4

Battery-powered electric vehicles are expected to reach a milestone in terms of shipments in 2019, but the technology faces several significant hurdles to gain wider adoption in the market. Limited driving range, high costs, battery issues, and a spotty charging infrastructure are the main challenges for battery electric vehicles (BEVs). In addition, there are issues with various power semic... » read more

Lithography Options For Next-Gen Devices
By Mark LaPedus - 18 Apr, 2019 - Comments: 2

Chipmakers are ramping up extreme ultraviolet (EUV) lithography for advanced logic at 7nm and/or 5nm, but EUV isn’t the only lithographic option on the table. For some time, the industry has been working on an assortment of other next-generation lithography technologies, including a new version of EUV. Each technology is different and aimed at different applications. Some are here today, w... » read more

Inspecting IC Packages Using Die Sorters
By Mark LaPedus - 18 Apr, 2019 - Comments: 0

The shift toward more complex IC packages requires more advanced inspection systems in the production flow to capture unwanted defects in products. This includes traditional optical inspection tools in the in-line production flow, but it also now requires new die sorting equipment with advanced inspection capabilities. Die sorters are not the kind of equipment that typically attracts attenti... » read more

Moore’s Law Now Requires Advanced Packaging
By Ed Sperling - 18 Apr, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss advanced packaging with Calvin Cheung, vice president of engineering at ASE; Walter Ng, vice president of business management at UMC; Ajay Lalwani, vice president of global manufacturing operations at eSilicon; Vic Kulkarni, vice president and chief strategist in the office of the CTO at ANSYS; and Tien Shiah, senior manager for memory at Samsung. W... » read more

Designing For The Edge
By Ann Mutschler - 17 Apr, 2019 - Comments: 0

Chip and system architectures are beginning to change as the tech industry comes to grips with the need to process more data locally for latency, safety, and privacy/security reasons. The emergence of the intelligent edge is an effort to take raw data from endpoints, extract the data that requires immediate action, and forward other data to various local, regional or commercial clouds. The b... » read more

The Role Of EDA In AI
By Brian Bailey - 17 Apr, 2019 - Comments: 0

Semiconductor Engineering sat down to discuss the role that EDA has in automating artificial intelligence and machine learning with Doug Letcher, president and CEO of Metrics; Daniel Hansson, CEO of Verifyter; Harry Foster, chief scientist verification for Mentor, a Siemens Business; Larry Melling, product management director for Cadence; Manish Pandey, Synopsys fellow; and Raik Brinkmann, CEO ... » read more

Finding The Source Of EUV Stochastic Effects
By Katherine Derbyshire - 15 Apr, 2019 - Comments: 7

The next phase of EUV development has begun—making EUV more predictable and potentially more mainstream—and it's looking to be every bit as difficult and ambitious as other developments in advanced lithography. In the early days of EUV development, supporters of the technology argued that it was “still based on photons,” as opposed to alternatives like electron beam lithography. Whil... » read more

Target: 50% Reduction In Memory Power
By Brian Bailey - 11 Apr, 2019 - Comments: 3

Memory consumes about 50% or more of the area and about 50% of the power of an SoC, and those percentages are likely to increase. The problem is that static random access memory (SRAM) has not scaled in accordance with Moore's Law, and that will not change. In addition, with many devices not chasing the latest node and with power becoming an increasing concern, the industry must find ways to... » read more

Low Power Meets Variability At 7/5nm
By Ann Mutschler - 11 Apr, 2019 - Comments: 0

Power-related issues are beginning to clash with process variation at 7/5nm, making timing closure more difficult and resulting in re-spins caused by unexpected errors and poor functional yield. Variability is becoming particularly troublesome at advanced nodes, and there are multiple causes of that variability. One of the key ones is the manufacturing process, which can be affected by every... » read more

Optimization Challenges For Safety And Security
By Brian Bailey - 11 Apr, 2019 - Comments: 0

Complexity challenges long-held assumptions. In the past, the semiconductor industry thought it understood performance/area tradeoffs, but over time it became clear this is not so simple. Measuring performance is no longer an absolute. Power has many dimensions including peak, average, total energy and heat, and power and function are tied together. Design teams are now dealing with the impl... » read more

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