category: Whitepapers

category: IoT, Security & Automotive

An Automated Pre-Silicon IP Trustworthiness Assessment For Hardware Assurance
By OneSpin Solutions - 27 Jan, 2021 - Comments: 0

Paper presented by Sergio Marchese & John Hallman of OneSpin Solutions & The Aerospace Corporation. Integrated circuit designs include in-house and third-party intellectual properties that could contain hardware Trojans. An independent, trusted, and complete IP model, suitable for automated formal comparison with the IP register-transfer level (RTL) code using commercially available ... » read more

A Triple-Deck CFET Structure With An Integrated SRAM Cell For The 2nm Technology Node And Beyond
By Coventor - 20 Jan, 2021 - Comments: 0

A novel triple-deck CFET structure is proposed for the first time as a candidate for area scaling. The proposed triple-deck CFET aggressively stacks a pass gate over an inverter to form a half SRAM bit cell. The integration flow and full metal connectivity have been carefully designed for functionality and array assembly. Most of the pitch used in the process is around 40nm, which is patternabl... » read more

An Integrated Approach To Power Domain And Clock Domain Crossing Verification
By Siemens EDA - 13 Jan, 2021 - Comments: 0

Reducing power consumption is essential for both mobile and data center applications. The challenge is to lower power while minimally impacting performance. The solution has been to partition designs into multiple power domains which allow selectively reducing voltage levels or powering off partitions. Traditional low power verification validates only the functional correctness of power control... » read more

Realize A More Productive EDA Environment From HPE With AMD
By Ansys - 13 Jan, 2021 - Comments: 0

Few industries are more competitive than modern electronics manufacturing and chip design. Consumers expect devices to be faster, cheaper, and more reliable with each generation. Whether large or small, electronics manufacturers rely on electronic design automation (EDA) to enable these improvements. Click here to access the white paper. » read more

Machine Learning — Everywhere: Enabling Self-Optimizing Design Platforms for Better End-to-End Results
By Synopsys - 13 Jan, 2021 - Comments: 0

Machine-learning offers opportunities to enable self-optimizing design tools. Very much like self-driving cars that observe real-world interactions to improve their responses in different (local) driving conditions, AI-enhanced tools are able to learn and improve in (local) design environments after deployment. These new, ML-driven capabilities can be embedded in different design engines, gi... » read more

Dual Mode C-PHY/D-PHY: Enabling Next Generation Of VR Displays
By Mixel - 13 Jan, 2021 - Comments: 0

For many years, Virtual Reality (VR) and Augmented Reality (AR) were strongly linked to gaming and entertainment applications. Today, the VR/AR and their combined version, Mixed Reality (MR), have their applications extended to other domains like healthcare, military, education, manufacturing, retail, marketing and advertising. What are the challenges for next generation VR displays? What makes... » read more

The Power Of Virtual Prototyping: From SoC Design To Software Development
By Arm - 13 Jan, 2021 - Comments: 0

Virtual prototypes and hardware design: More powerful and complex integrated circuits and System-on-Chip (SoC) designers have a daunting task at both the hardware and software level. SoC architects need a method for early evaluation of hardware components, known as Intellectual Property (IP) blocks, that will have direct impact on the commercial success of the SoC. There are a range of complex ... » read more

Verifying Safety-Critical FPGA Designs With Fault Simulation
By Synopsys - 12 Jan, 2021 - Comments: 0

Supporting safety and assurance in designs, such as the chips used in industrial, aerospace and defense applications, requires more than traditional functional verification. Even if every bug is found and fixed before release, these applications have additional requirements for functional safety. They must be able to handle a variety of faults and induced errors, either by correcting them or by... » read more

Part Average Test (PAT)
By yieldHUB - 12 Jan, 2021 - Comments: 0

With semiconductor manufacturers producing huge amounts of data, it can be hard to guarantee quality and reliability, even with internal tools. Many companies outsource Part Average Testing (PAT) to a bespoke yield management provider. Provided they meet the standards set out by AEC, the tool will be invaluable in guaranteeing quality and reliability for your customers. Click here to con... » read more

Photonic Integration Based On A Ferroelectric Thin-Film Platform
By Advantest - 11 Jan, 2021 - Comments: 0

Photonic-integrated circuits (PICs) using ferroelectric materials are expected to be used in many applications because of its unique optical properties such as large electrooptic coefficients. In this study, a novel PIC based on a ferroelectric thin-film platform was designed and fabricated, where high-speed optical modulator, spot-size converters (SSCs), and a variable optical attenuator (VOA)... » read more

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