category: Whitepapers

category: IoT, Security & Automotive

Accelerate And Derisk RISC-V- Based SoC Designs
By Arteris - 26 Mar, 2025 - Comments: 0

How to accelerate and derisk RISC-V-based SoC designs using silicon-proven network-on-chip IP and SoC integration automation software. This technology seamlessly connects any IP from multiple vendors and shortens design cycles and time to revenue. Maximize overall efficiency for the best product design, leveraging the best NoC IP and expert support. Read more here. » read more

Allegro X AI for Generative System Design
By Cadence - 26 Mar, 2025 - Comments: 0

PCB design is the act of realizing a schematic into a physical form. Currently, human designers use electronic design automation (EDA) software to combine component placement and routing to realize the electrical connectivity on a manufacturable PCB. Computer-aided design (CAD) tools have been used in the design flow since the 1970s and are now an essential part of the designer’s toolkit. Som... » read more

New Innovative Way To Functionally Verify Heterogeneous 2D/3D Package Connectivity
By Siemens EDA - 12 Mar, 2025 - Comments: 0

Historically, IC package design has been a relatively simple task which allowed the die bumps to be fanned out to a geometry suitable for connecting to a printed circuit board. The package netlist was often captured by the package designer, typically using Excel to manually assign net names to the desired die bumps and BGA balls to achieve the intended connection. Modern package and interpos... » read more

Silicon Reimagined: New Foundations For The Age of AI
By Arm - 12 Mar, 2025 - Comments: 0

The semiconductor industry is undergoing a pivotal transformation driven by the rise of artificial intelligence (AI) and the slowing of traditional Moore’s Law scaling.  In this comprehensive 42 page report, several key trends shaping the industry’s future are highlighted. The push toward more specialized architectures tailored for specific workloads, particularly in AI. The critic... » read more

Application Of External CFD Modeling In Data Center Design
By Cadence - 12 Mar, 2025 - Comments: 0

Rising IT densities and AI workloads demand smarter heat management and equipment placement. This paper "Application of External CFD Modeling in Data Center Design" explores how external computational fluid dynamics (CFD) modeling provides crucial insights by resolving airflow patterns around buildings. Why Choose External CFD Modeling? Recommended by The Green Grid, it helps predict: ... » read more

Unlocking Generative AI On The Edge Across The Semiconductor Value Chain
By Expedera - 12 Mar, 2025 - Comments: 0

In the second of a three-part series, Expedera, in conjunction with the Global Semiconductor Alliance’s Emerging Technologies (EmTech) group, explores “Unlocking Generative AI on the Edge across the Semiconductor Value Chain”. Included in this white paper is an examination of how members of the value chain (including IP providers, EDA vendors, fabless chip makers, foundries, OSATs, OEMs, ... » read more

LLE-Aware Design Methodology To Avoid Timing And Power Pessimism
By Synopsys - 12 Mar, 2025 - Comments: 0

As chips move to ever-finer geometries, the active region (diffusion) shapes of neighboring cells can impact timing analysis and power calculations for the entire design. The LLE (Local Layout Effect) impact must be measured, but the impact is reflected very conservatively using conventional approaches. This paper describes a LLE-aware design methodology that mitigates the conservatism of co... » read more

Extracting Parasitic Impedance Of Semiconductor Power Modules
By Ansys - 12 Mar, 2025 - Comments: 0

As a key component in energy conversion system, power semiconductor devices are widely used in various applications, e.g., electric vehicles, renewable energy conversion, and uninterrupted power supplies. The trend for power converter design is always toward higher power density. Power modules that integrate multiple semiconductor devices can meet this demand. It also reduces the compl... » read more

Reversible Chain Diagnosis
By Siemens EDA - 11 Mar, 2025 - Comments: 0

For advanced technologies, the industry is seeing very complicated silicon defect types and defect distribution. One consequence is that scan chain diagnosis becomes more difficult. To improve the resolution of scan chain diagnosis, Tessent Diagnosis can use new scan chain test patterns to leverage a reversible scan chain architecture. This paper describes the novel scan chain architecture t... » read more

Full-Chip Voltage Contrast Inference Using Deep Learning; You Only Look Once: Voltage Contrast (YOLO-VC)
By PDF Solutions - 11 Mar, 2025 - Comments: 0

Abstract: The electron beam inspection methodology for voltage contrast (VC) defects has been widely adopted in the early stages of sub-10nm logic and memory technology development, as well as in new product introductions. However, due to throughput limitations, full-chip inspection at the 300mm wafer scale remains impractical for yield ramp and production applications. To address this challeng... » read more

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