Achieving Successful Timing, Power, And Physical Signoff For Multi-Die Designs


Multi-die designs using 2.5D and 3D technologies are increasingly important for a wide range of electronics applications, including high-performance computing (HPC), artificial intelligence (AI), automotive, and mobile. The multi-die architecture enables designers to mix dies from different foundries and technology nodes, including existing dies from previous projects. The resulting density and... » read more

How Engineering Simulation Drives Impact for Sustainability


For decades, engineering simulation has been the engineer’s Swiss Army knife for improving the speed and cost of developing new products as well as for bringing product performance to the next level. This report reveals that while simulation has already made a significant contribution to advancing sustainability, there is still so much potential to make an even greater impact. In the conte... » read more

How Google And Intel Use Calibre DesignEnhancer To Reduce IR Drop And Improve Reliability


In the fast-paced world of semiconductor design, achieving both Design Rule Check (DRC) clean layouts and optimal electrical performance is crucial for minimizing design iterations, reducing time-to-market and ensuring product reliability. This paper explores how the Calibre DesignEnhancer (DE) analysis-based, signoff-quality EMIR solution helps design teams meet these challenges by enhancing p... » read more

Why Your Data Center Needs a Digital Twin


The global digital twin market is on a rapid ascent, projected to skyrocket from $11.51 billion in 2023 to $137.67 billion by 2030. Spanning industries from aerospace to healthcare, digital twins are becoming an essential tool for efficient management. But what is a digital twin? Essentially, it’s a digital replica of any real-world entity—a product, system, or process—used for simulation... » read more

Cut Defects, Not Yield


Many chipmakers face a difficult trade-off — improve quality without affecting yield. Traditional testing methods fail to navigate this challenge due to their limited visibility below the pass/fail limits, discarding perfectly good chips or letting small defects slip through to the field. The challenge is clear: manufacturers must achieve both quality and yield goals without sacrificing one f... » read more

Streaming Scan Network


Tessent Streaming Scan Network (SSN) is a system for packetized delivery of scan test patterns. It enables simultaneous testing of any number of cores with few chip-level pins, and reduces test time and test data volume. With SSN, DFT engineers have a true SoC DFT solution without compromises between implementation effort and manufacturing test cost. Challenges with DFT for complex SoCs The... » read more

Averting Hacks Of PCIe Transport Using CMA/SPDM


This paper describes the component measurement and authentication (CMA) and security protocol and data model (SPDM) flow used to establish the secure channels required for the transmission of encrypted packets. The various approaches, namely the symmetric and asymmetric flows, will be discussed in establishing a secure connection with the implementation of CMA/SPDM packets through data objects.... » read more

Fully Coupled CFD Simulations for Micro Gas Turbine Engines


This conference paper offers a detailed exploration of the fully coupled CFD simulation of a KJ66 micro gas turbine (MGT) engine—an innovative approach that enhances the accuracy and fidelity of 3D numerical analysis. Key Takeaways: Integrated Approach: Unlike traditional component-by-component analysis, fully coupled simulations account for the interactions between the compressor, co... » read more

Power And Sensing Selection Guide 2024-2025


This latest edition of the power & sensing selection guide compares our products’ key benefits and the latest power and sensing technology advancements to find what you need for your designs. Technologies covered include: MOSFETs, MCUs, power management ICs, wide-bandgap semiconductors, sensors, power switches, USB-C and more. Read more here. » read more

Accelerating Artificial Intelligence Innovation With Concurrent Design Engineering


Artificial intelligence (AI) is transforming every industry and creating new demands for computing performance, efficiency, and scalability. Designers are creating and deploying AI-dedicated chips to meet these challenges and enable faster and smarter applications across various domains, such as cloud, edge, mobile, automotive, and the Internet of Things (IoT). However, designing AI chips is no... » read more

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