Warpage Of Compression Molded SiP Strips


By Eric Ouyang, Yonghyuk Jeong, JaeMyong Kim, JaePil Kim, OhYoung Kwon, and Michael Liu of JCET; and Susan Lin, Jenn An Wang, Anthony Yang, and Eric Yang of CoreTech System (Moldex3D). Abstract System-in-Package (SiP) technology has been used for a wide range of electronic devices, but the warpage behavior of the package can be difficult to control and predict due to complex manufacturing p... » read more

Chip-Last HDFO (High-Density Fan-Out) Interposer-PoP


Interposer Package-on-Package (PoP) technology was developed and has been in very high-volume production over the last several years for high-end mobile application processors (APs). This is due to its advantages of good package design flexibility, controllable package warpage at room temperature (25°C) and high temperature (260°C), reduced assembly manufacturing cycle time and chip-last asse... » read more

A Sub-1 Hz Resonance Frequency Resonator Enabled By Multi-Step Tuning For Micro-Seismometer


We propose a sub-1 Hz resonance frequency MEMS resonator that can be used for seismometers. The low resonance frequency is achieved by an electrically tunable spring with an ultra-small spring constant. Generally, it is difficult to electrically fine-tune the resonance frequency at a near-zero spring constant because the frequency shift per voltage will diverge at the limit of zero spring const... » read more

Technology Advancements For Dynamic Function eXchange In Vivado ML Edition


As systems become more complex and designers are asked to do more with less, adaptability is a critical asset. While Xilinx FPGAs and SoCs always provided the flexibility to perform on-site device reprogramming, current constraints including increased cost, tighter board space, and power consumption demand even more efficient design strategies. Xilinx Dynamic Function eXchange (DFX) extends the... » read more

A Guide To FT‑NIR Spectroscopy In The Chemical Lab


Quality control in the chemical and petrochemical industry is a complex task. Often the many different parameters need to be analyzed using a wide variety of instruments and complex workflows. Timing is also very important — the production team needs results within minutes, not hours. FT-NIR can help you simplify analysis routines in the lab. Often, many different parameters can be analyzed w... » read more

Calibrate And Configure Your Power Management IC With NVM IP


Power Management Integrated Circuits (PMICs) are the first to turn on and the last to turn off in a system. They perform the task of delivering the right voltage to component chips by regulating or boosting the voltage levels to the component chips. Some PMICs are configured once at the factory and an area-efficient OTP NVM is the best choice. When a PMIC is expected to be re-configured mult... » read more

SoC Power Methodology: Are We Lean Enough


It’s interesting how past lessons learned have such relevance in today’s quest for an optimum system-on chip (SoC) power methodology. Lean manufacturing was introduced by the Toyota Motor Corporation in the 1930s. It is now an essential methodology in most manufacturing and industrial settings. As lean methodology evolved, it extended to software development where its principles have led to... » read more

Realizing The Future Of Fast EV Charging Through CoolSiC Based Topology Design


While consumers are keen to reduce their carbon footprint, the move to E-Mobility, especially private electric vehicles (EV), is hindered by the limited charging infrastructure, most notably in fast charging. This white paper reviews the charging landscape and examines implementation approaches for fast DC chargers. Specific focus is placed on chargers delivering 350 kW and more for fast electr... » read more

RF/Microwave EDA Software Design Flow Considerations For PA MMIC Design


In this white paper, a gallium arsenide (GaAs) pseudomorphic high-electron mobility transistor (pHEMT) power amplifier (PA) design approach is examined from a systems perspective. It highlights the design flow and its essential features for most PA design projects by illustrating a simple Class A GaAs pHEMT monolithic microwave IC (MMIC) PA design using Cadence AWR Microwave Office circuit desi... » read more

PCIE 6.0 Vs 5.0 — All You Need To Know


While the PCI-SIG has announced that the release of the PCI Express® 6.0 (PCIe 6.0) specification should arrive in 2022, Rambus is already addressing the needs of early adopters looking for the most advanced PCIe 6.0 IP solutions for their SoC and ASIC designs. You can find all about the new generation specification in the article below. Click here to read more. Article or... » read more

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