category: Whitepapers

category: IoT, Security & Automotive

Distributed Development Of IP And SoC In Compliance With Automotive ISO 26262
By Synopsys - 24 Feb, 2021 - Comments: 0

Automotive functional safety System-on-Chips (SoCs) for Advanced Driver Assistance Systems (ADAS) contain several complex Intellectual Property (IP) cores. The IP cores are developed as a Safety Element out of Context (SEooC), meaning the context of the end application is not fully known at delivery time. In addition, IP development might be distributed across the globe. To reduce the risk of f... » read more

5G NR Design For eMBB
By Cadence - 24 Feb, 2021 - Comments: 0

This white paper examines the design challenges for eMBB products and provides examples of how these challenges can be overcome using the co-design capabilities in Cadence AWR Design Environment software. Click here to download with registration. » read more

OVP Guide To Using Processor Models
By Imperas - 24 Feb, 2021 - Comments: 0

The OVP simulation technology from Open Virtual Platforms (OVP) and Imperas Software Limited enables very high performance simulation, debug and analysis of virtual platforms containing multiple processor and peripheral models. The OVP technology is extensible, provides the ability to create new models of processors and other platform components by writing C/C++ code that uses application progr... » read more

WLFO For High-Performance Low-Cost Packaging Of RFMEMS-CMOS
By Amkor - 17 Feb, 2021 - Comments: 0

Navigating the trade-offs between performance, size, cost and reliability can be a challenge when considering integrated circuit (IC) packaging and the end-application. The integration of micro-electromechanical systems (MEMS), either monolithic or heterogeneous, introduces yet another level of complexity that has only recently been a major focus of multi-device packaging. Wafer-level fanout (W... » read more

Marangoni Effect-Based Under-Layer For A Dual Damascene Via-First Approach
By Brewer Science - 17 Feb, 2021 - Comments: 0

One of the main challenges of a Dual Damascene (DD) via-first process is the control of the Critical Dimensions (CDs) in the lithography of the trenches. The PhotoResist (PhR) thickness presents variations from the via arrays to the open areas, which cause the variation of CDs: the swing effect. The planarization of a DD via-first process is reported. A dual-layer solution is used to demonstrat... » read more

Evaluation Of The Impact Of Source Drain epi Implementation On Logic Performance Using Combined Process And Circuit Simulation
By Coventor - 17 Feb, 2021 - Comments: 0

In this paper, we explore an end-to-end solution using SEMulator3D to address the need to include process variation effects in circuit simulation. For the first time, we couple SEMulator3D with BSIM compact modeling to evaluate process variation impacts on circuit performance. The process integration goal of the study was to optimize contacts and spacer thickness of advanced-node FinFETs in ter... » read more

Analysis And Development of Safety-Critical Embedded Systems
By Ansys - 13 Feb, 2021 - Comments: 0

Today’s automobiles and airplanes feature more electronic components than ever. Hundreds of connected systems enable safety-critical functions like braking, acceleration, steering, navigation and communication. Ansys has the only comprehensive simulation solution for designing safe, reliable systems — including hardware, electronics and embedded software — for human-controlled and autonom... » read more

Using AWS Cloud Services For IC Library Characterization That Is Scalable, Secure, And Fast
By Siemens EDA - 10 Feb, 2021 - Comments: 0

Siemens’ AMS Verification team and Amazon Web Services (AWS) have collaborated to provide users with a scalable, secure and cost-effective cloud characterization flow that enables users to leverage cloud computing resources to accelerate library characterization, reduce compute resource bottlenecks, as well as improve characterization runtime predictability. To read more, click here. » read more

Powering The Edge: Driving Optimal Performance With Ethos-N77 Processor
By Arm - 10 Feb, 2021 - Comments: 0

Repurposing a CPU, GPU, or DSP is an easy way to add ML capabilities to an edge device. However, where responsiveness or power efficiency is critical, a dedicated Neural Processing Unit (NPU) may be the best solution. In this paper, we describe how the Arm Ethos-N77 NPU delivers optimal performance. Click here to read more. » read more

Optimizing Power Supply
By Cadence - 10 Feb, 2021 - Comments: 0

Any electrical engineer knows providing power to your board is a key feature in PCB design. While most boards can be functional, their true quality shines when the perfect level of power to components is achieved. Building and designing better power supplies is the best way to ensure the end-product has full life-cycle potential. But how do we ensure we can convert a (potentially variable) i... » read more

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