Directed Self-Assembly Finds Its Footing

Ten years ago, when the industry was struggling to deliver EUV lithography, directed self-assembly (DSA) roared to the forefront of research and development for virtually every manufacturer determined to extend the limits of 193i. It was the hot topic at of the 2012 SPIE Advanced Lithography Conference, with one attendee from Applied Materials comparing its potential to disrupt the industry to the 1969 Woodstock concert. [1]

Like many new technologies in the semiconductor industry, however, the promise and excitement of DSA’s potential to solve a major industry challenge soon ran up against increasingly insurmountable challenges of its own. The complexities of defect control, scalability, and integration into existing workflows, to name just a few, stymied progress. The buzz quieted, and DSA was shelved by most companies, especially as EUV got closer to production.

But the problems DSA initially targeted, like improving CD in patterns at the limits of current lithography techniques, have not gone away. In addition, some new ones like stochastic defects in the most advanced EUV nodes are emerging. According to Chris Mack, CEO of Fractilia, stochastics can account for more than 50% of a high-volume manufacturer’s (HVM) total EUV patterning error budget. [2]

“The general criticism of DSA is that it’s difficult to control the defectivity because of the self-assembly nature of the structure,” says Hyo Seon Suh, R&D team leader at imec. “But stochastic defects in EUV are also difficult to control, and that’s why a lot of the industry, and our core chipmaker partners, are looking at DSA again as a viable option for rectifying stochastic issues.”

An Intel spokesperson also says the company is currently pursuing several integrated process flows that utilize directed self-assembly (DSA). “One process flow that we have discussed publicly at conferences such as SPIE is EUV resist rectification with DSA. DSA can fundamentally improve systematic and random variations inherent to EUV lithography. Using this technology, Intel has demonstrated a DSA-enhanced EUV multi-patterning approach with a final metal pitch of 18nm and robust electrical performance.”

Others agree. “DSA is coming back,” said Rama Puligadda, CTO at Brewer Science. “But in a very different form. It is being used to assist EUV, not for multiplying the pitch but for rectifying the lines.”

Directed self-assembly (DSA) typically is described as a process in which co-polymer materials self-assemble to form nanoscale resolution patterns on a semiconductor substrate. While this is an accurate description, it doesn’t provide much detail as to how this process is accomplished and why these co-polymer materials behave in the ways they do. A somewhat simplified explanation of this process is helpful for understanding how DSA technology can benefit CD resolutions and provide repairs for the lower nodes.

The science of separation — from salad dressing to semiconductors
Just as oil and vinegar segregate into distinct layers due to their incompatible nature, certain polymers used in DSA behave similarly, but on a nanoscopic scale. DSA typically combines monomers of styrene (S) to form polystyrene (PS), and monomers of methyl methacrylate (MMA) to form poly methyl methacrylate, or PMMA.

The polymers typically utilized in DSA, such as polystyrene and PMMA, are designed to phase-separate chemically, akin to oil and vinegar. Unlike the latter, where separation is uniform, in DSA, the segregation of these polymers can be meticulously controlled, resulting in precise nanoscale structures.

Fig 1: Representation of PS-b-PMMA block co-polymer. The length of each block, controlled by the number of monomers in each block, is the determining factor for pitch. Source: Semiconductor Engineering/Gregory Haley

PS is typically synthesized via anionic polymerization. This involves using a strong base like sodium or potassium to form a carbanion, which plays a crucial role in chain growth. The precise control offered by anionic polymerization makes it ideal for creating polymers with specific lengths and molecular weights. PMMA, on the other hand, may be synthesized through free radical polymerization or Atom Transfer Radical Polymerization (ATRP). Although different from PS synthesis, both processes are geared toward creating polymers with specific characteristics. This is important since the shapes of the resulting structures in the DSA process are determined by the final configuration of these polymers. [3]

The PS-b-PMMA copolymer
When synthesized using techniques such as ATRP, the PS and PMMA polymers form the block copolymer (BCP) PS-b-PMMA. The blocks of PS and PMMA are covalently linked within the polymer chain, but they segregate into distinct domains due to their chemical dissimilarity (see figure 1).

PS is also a hydrophobic block, where PMMA is hydrophilic, so when they are formed into a chain, the PS ends of the BCP connect and the PMMA ends connect while repelling each other. (Figure 2)

Fig. 2: The distinct domains created in a PS-b-PMMA BCP chain provide the base template for the semiconductor structures. Source: Semiconductor Engineering/Gregory Haley.

It should be noted that the larger the energy difference between the blocks, the more pronounced the segregation between them, which allows for smaller chain lengths and more refined control over the CD that can be formed. [1]

As with most things in semiconductor manufacturing, however, nothing is free. If the energy difference is too large, it can lead to excessive phase separation, potentially causing processing complications or defects in the fabrication process. Balancing the energy difference between the blocks, the chain length, and the desired domain size requires careful optimization and consideration of the specific application. Achieving this balance is a complex task that calls for precise control and understanding of polymer chemistry.

Defining the CD
There are two effective ways to pattern silicon using DSA — graphoepitaxial and chemoepitaxial flows. Graphoepitaxial flows use conventional lithography to pattern a substrate with dimensions typically 2X to 5X the size of the final CD. The trench is filled with the BCP and annealed (>180°C) to induce phase separation. The bottom of the trench must be neutral to prevent the BCP from adhering to the substrate, while one wall is wet bonded to the BCP. The CD of the resulting structure is defined by the length of the BCP chains (see figure 3).

Fig 3. A simplified flow demonstrating graphoepitaxial directed self-assembly. Source: Semiconductor Engineering/Gregory Haley

Chemoepitaxial flows, on the other hand, rely on differing surface energies to align the BCP layers. In this process, a region of cross-linked PS is applied to the substrate next to a neutral region. The PS in the BCP forms a bond with the cross-linked PS, but not with the PMMA, and the neutral region forms no bond. The PS bond provides the anchor for the BCP flow, aligning the phase shifted BCP in the vertical dimensions (see figure 4).

Fig 4. A simplified flow demonstrating chemoepitaxial DSA. Source: Semiconductor Engineering/Gregory Haley

“If you’re using, for example, a 193i process, it cannot print this pitch pattern,” says Suh. “But we can make a larger pitch pattern and fill out that one with DSA. It’s called ‘pitch splitting.’ DSA makes it possible for manufacturers to achieve dimensions only possible with EUV, but without having the expense of buying an EUV tool.”

One of the strengths of DSA is its flexibility for forming different structures based on the monomer ratio of the PS to PMMA. Lamellae patterns like those shown in the above figures can be obtained when the fraction of each polymer is around 50%. A significantly lower ratio of one block to the other can form spheres of the smaller block within the matrix of the larger block, whereas higher ratios of that same block can form cylindrical structures. This is useful for improving the CD of holes or even multiplying holes (see figure 5).

“The defining structure does not need to be perfect,” adds Suh. “We just need some pattern that we can guide the self-assembly of a local polymer that will do the work to make a clean pattern.”

Fig. 5: The process of obtaining a smaller-dimension hole pattern from a larger one. Source: imec

As mentioned above, these are simplified examples of the two general types of process flows, though there are multiple subsets within each that utilize different chemicals, materials, and layers; orders of action; and additional steps to achieve desired results.

Both graphoepitaxy and chemoepitaxy have their strengths and weaknesses. Graphoepitaxy takes advantage of well-established processes to form the base structure and typically requires fewer steps to achieve the final CD. However, it requires the dimensions of the trench to match exactly with the BCP chain lengths of bonded pairs, and any line pattern irregularities can show up in the BCP structure.

Chemoepitaxy requires less space to achieve similar CD and offers more flexibility in design, as it does not need to match exactly with the BCP chain lengths. But it often involves more complex and delicate processes, including the use of specific chemical patterning materials, which can make it more challenging to control. Chemoepitaxy also may be more sensitive to variations in surface energy and polymer-substrate interactions, potentially leading to defects if not handled with precision.

DSA’s downside is defectivity
Bringing DSA out of the lab and into the fab is still hindered primarily by defect control. Though control has improved considerably in the past three years, defects are still too high to meet industry standards of <1/cm². Common defects in DSA include bridging between lines, line collapse, bubbles, and line dislocations. Dislocations are a particular challenge since they cannot be removed during the etch or pattern transfer (see figure 6).

Fig. 6: The density per square centimeter for different defects for 13nm/P28 of EUV pattern with DSA. Source: imec

The problems of defectivity in DSA are complex, with many factors influencing defects. Process-related issues can include annealing temperature, etching method, stripping method, and required film thickness, while chemical factors like the purity and composition of the BCP itself can induce problems.

A significant drawback of the DSA process is it can only make periodic, simple structures, such as a line in space or a hole, making it much better for regular memory devices but harder for logic. “If a device has a structure that we have to print, it must be periodic and simple,” said Suh. “This is great for DRAM, where the structures are basic and uniform in highly repeated patterns. In the case of logic, that is a more random structure, so the design of the structure needs to be DSA-aware.”

Others agree. “The biggest challenges with DSA have always been defectivity and how to make layouts DSA-friendly,” said an Intel spokesperson. “Intel has worked with materials and tool suppliers for several years to drive DSA defects down to HVM levels, and with internal design teams to make layouts compatible with DSA.”

DSA inspection and metrology
There is a significant issue with dimensional metrology of DSA structures. The sensitivity of the measurement is challenged by the lack of chemical contrast on the patterns formed from DSA. These patterns can be seen better after they have been transferred to the substrate (via etch), but that severely limits the options for fine-tuning and correction, leading to costly and time-consuming rework or even the scrapping of entire batches.

CD-SEM images are mostly used to identify pattern defects in DSA structures, but CD-SEMs are slow and limited to a few sample sites on a wafer, which is a problem considering the higher defect rates of DSA. Plus, there are few datasets with comparative supervised models for analysis. However, researchers at imec presented a paper in June about using machine learning (ML) models of SEM image analyses to obtain complete labels for a dataset of hexagonal contact hole DSA patterns using YOLOv8, a state-of-the-art neural network, that achieved precision of more than 0.9 mAP (90% of mean average precision). [4]

Today’s DSA inspections typically are conducted using scatterometry, according to multiple sources. However, imec’s Dehaerne and colleagues note there is no traditional, automatic defect inspection software available for DSA analyses. “Machine learning-based SEM image analysis has become an increasingly popular research topic for defect inspection with supervised ML models.” [4]

Emerging DSA uses
The research presented on metrology is just one recent development in groundbreaking new applications for DSA in semiconductor manufacturing. Scientists at the Korea Advanced Institute of Science and Technology are using <10nm BCPs to self-assemble along the atomic edge of 2D flakes of graphene for reliable nanopatterning of 2D materials with very low levels of line-edge and line-width roughness to form <10nm graphene nanoribbon arrays with switching characteristics.

Scientists at Brookhaven National Laboratory recently developed a superconducting thin-film quantum material (<100nm thick) on silicon substrates using DSA. Their process could allow cost-effective, high-volume manufacturing (HVM) of thin-films in existing semiconductor manufacturing processes that exhibit electrical transfer at near-zero loss of energy.

Conclusion
It is an exciting time for the re-emergence of directed self-assembly. DSA offers a viable manufacturing process for pattern rectification at the lower nodes of 193i and EUV lithography as defectivity rates are decreasing and new metrology options come online. Most attractively, it can enable extension of 193nm lithography without having to purchase an EUV scanner.

After a promising start a decade ago followed by years languishing in the lab, the field of DSA is suddenly advancing more rapidly. Though DSA is not used in production yet, research into new process flows and higher-quality polymers can enable even finer control over feature size and patterning than ever before in repeating structures.

References

1. M. Lapedus, “Directed Self Assembly Grows Up,” Semiconductor Engineering, March 21, 2013.
2. G. Haley, “Challenges Grow for CD Sems and 5nm and Beyond,” Semiconductor Engineering, April 11, 2023.
3. Douglas Guerrero, A Lithographer’s Guide to Patterning CMOS Devices with Directed Self-Assembly, SPIE Press (2020), http://dx.doi.org/10.1117/3.2567441
4. E. Dehaerne, et al., “YOLOv8 for Defect Inspection of Hexagonal Directed Self-Assembly Patterns: A Data-Centric Approach,” 38th EMLC Conference (2023), arXiv:2307.15516