Emulation Uses Increase

For more than two decades, was a technology in search of a market. While on paper it has always made sense to speed up simulation, using hardware acceleration was so pricey that few companies could justify the cost.

Fast-forward to today and emulation is a major contributor to the bottom line at all of the Big Three EDA companies. It is in use at chipmakers and software houses around the globe—not just at big processor makers such as Intel or AMD. What’s interesting, though, is the drivers for this surge in popularity are well beyond the reasons anyone would have guessed when it was first introduced. While hardware simulation is slow in comparison to emulators for large complex chips, it’s the confluence of hardware, software, power, IP integration and a number of other factors that has really made the emulation market so robust.

“We’re seeing emulation going mainstream in many different markets, from networking to storage to multimedia,” said Jean-Marie Brunet, marketing director for Mentor Graphics‘ Emulation Division. “There is certainly a correlation to advanced processes, so designs at 14nm and 10nm will be bigger. But the key trend is that emulation is growing in many different markets because of its capacity and the speed at which it can simulate and verify systems. We’re seeing it for customers who never used emulation because they need something for the software guys. And then you’ve got a big shift left.”

Brunet said at the advanced nodes, the cost of two or three respins is prohibitive for many companies, so doing more up front is much easier to justify from a cost basis.

Cadence keeps a running tally of how many different uses there currently are for simulation. At last count there were 23 of them (see chart below)—some not even recommended by Cadence, such as performance validation to ensure designs have the right elements and the correct number of transactions. And there are likely to be many more uses as the technology gains acceptance.

“The messaging on emulation has three components—productivity, predictability and versatility, which is use models,” said Frank Schirrmeister, group director for product marketing for the System Development Suite at Cadence. “We provide a recipe of supported use models, but there are also user applications where things are done in a way we didn’t know about.”

What’s different
What changed since the advent of emulation is that it is now being used throughout the design cycle, from software prototyping and co-design to power analysis. The initial reason behind emulation was a combination of complexity and time to market, but as companies begin getting comfortable with using emulators—and paying for them—they also are discovering new uses ranging from improving software to making software run more efficiently.

“The biggest category of users for us are people who have a large amount of software to develop, and they want to run it before tapeout,” said Tom Borgstrom, director of marketing for the verification group at Synopsys. “We’re starting to see software-centric SoCs. They’re for mobile platforms, but they have to boot Linux or Android and execute all the software before silicon. We’re seeing long software workloads, too. Almost every large SoC is multicore, and all the cores run software and interact with one another.”

There also is an increasing demand for power-aware emulation, Borgstrom said. “There are a lot of power sequences controlled by software, and you can do on-board sequence control of power states. We’re also seeing power estimation as another driver. You can capture data for peak power using different behavioral modes.”

While emulation has always been used for debug, that work was done prior to tapeout. Increasingly the technology also is being used for post-silicon debug to determine where bugs are and then, in combination with assertions and formal technology, digging down into designs to find out where the problems are and what can be done about them.

“We’re also seeing it used for generation and extraction of test vectors,” said Cadence’s Schirrmeister. “And we’re seeing dynamic power analysis, where teams are running longer or deeper cycles to do power analysis.”

Deep cycles are critical for fully understanding a chip’s behavior under real-world conditions. For example, a chip may slow down after a period of operation because it exceeds its thermal budget and needs to be throttled back.

New markets and tool consolidation
What’s also changed in the emulation world is the customer base. Jim Kenney, director of marketing for Mentor’s Emulation Division, said China and Taiwan are both becoming major users of emulation. They’re also combining that, as other emulation users have done, with FPGA prototypes and simulation.

“I don’t know of any customers that are not using all three,” Kenney said. “And at least for now, formal is still a separate world.”

Analog has made some inroads into emulation, but its use so far is extremely limited. This is a new way of approaching analog—applying techniques from the digital world—and it remains to be seen if and when it catches on. But as demand for analog components increases, particularly with the vast numbers of IoT sensors that will be required in the future, along with the adoption of more formal verification techniques on the debug side, there are hints from the Big Three EDA vendors that some of these traditional barriers will be broken down. At the very least, all say they are getting more inquiries from companies they never sold emulation platforms to in the past for a variety of purposes, including for remotely accessing them through a virtual private cloud.

How much of that filters into buying emulators, renting them via an outsourced cloud model, or employing them for entirely different uses is anyone’s guess. But the reality is that all of this work has to be done more efficiently, more reliably and much more quickly, and at this point emulation appears to be a serious contender for getting the job done.

Source: Cadence