Manufacturing Bits: June 7

High-voltage superjunction SiC devices
The University of Warwick and Cambridge Microelectronics have presented a paper on the latest effort to develop of a new type silicon carbide (SiC) power device called a SiC superjunction Schottky diode.

Researchers have simulated and optimized the development of 4H-SiC superjunction Schottky diodes at a voltage class of 1700 volts, aiming for breakdown voltages above 2 kV. Others are working on similar devices. In other words, the industry is looking for ways to extend the breakdown voltage levels of today’s unipolar SiC power devices. This in turn could enable SiC power devices to participate in new and higher-voltage markets.

SiC, a compound semiconductor material based on silicon and carbon, is used to make specialized power semiconductor devices. These devices are used in high-voltage applications like electric vehicles, power supplies, solar inverters and trains.

Power semiconductors based on SiC and other technologies help control and convert electrical power in systems. Power semis are specialized transistors that boost the efficiencies and minimize the energy losses in systems. They operate like a switch in systems, allowing the electricity to flow in the “on” state and stop in the “off” state.

In conventional MOSFET devices, the source, gate, and drain are on top of the device. In comparison, power semiconductors feature a vertical structure, where the source and drain are located on opposite sides of the device. A vertical structure enables the device to handle higher voltages.

Today’s power semiconductor market is dominated by silicon-based devices, such as power MOSFETs, superjunction power MOSFETs and insulated-gate bipolar transistors (IGBTs). Power MOSFETs are used in lower-voltage 10- to 500-volt applications, such as adapters and power supplies. Superjunction power MOSFETs are used in 500- to 900-volt applications. IGBTs, the leading midrange power semiconductor devices, are used in 1,200-volt to 6.6-kilovolt applications.

“The silicon superjunction range sits between ~500 and 900 V, and is a bridge between the fast switching, low-voltage MOSFETs, and IGBTs with their low conduction losses,” explained Peter Gammon, an associate professor at the University of Warwick, in an e-mail exchange.

IGBTs and MOSFETs are mature and inexpensive, but they are also reaching their limits. That’s where power semiconductors based on SiC and gallium-nitride (GaN) materials fit in. Both SiC as well as GaN are wideband-gap materials that enable devices with higher efficiencies and smaller form factors. For example, SiC has 10X the breakdown electric field strength and 3X the band gap over silicon. But they are also more expensive than silicon-based power semis.

Nonetheless, there are two SiC device types—SiC MOSFETs and diodes. SiC MOSFETs are power switching transistors. A SiC diode passes electricity in one direction and blocks it in the opposite direction. “Today’s commercially available SiC MOSFETs are widely available from 600 to 1700 V. A few suppliers are releasing 3.3 kV MOSFETs now. MOSFET technology could reach 10 kV eventually, but the resistive on-state losses will start getting high,” Gammon said.

At higher voltages, though, SiC has some issues. “Today, we have a class of very good, low resistance, fast switching SiC MOSFETs rated up to 1700 V,” Gammon said. “However, as we try to scale up the voltage further to 3.3 kV and beyond, the resistance is going to scale up with it, until those resistive losses become problematic. One way to reduce the resistance is to use a bipolar device, such as an IGBT. This might be the preference at 15 kV and above in SiC, but these have very high switching losses.”

That’s where SiC superjunction devices fit in. It could extend SiC power devices beyond 3.3 kV. “A half step between the two extremes is to use superjunction technology, which is in the intermediate voltage range (3.3 kV to 10 kV). This has the potential to find the best balance between lowering resistance without increasing too much the switching losses,” Gammon said.

But there are some challenges to develop high-voltage superjunction SiC devices. Basically, the industry requires new manufacturing techniques. The superjunction principle can be applied to SiC, but the traditional fabrication techniques, such as epitaxial growth and implantation, are not mature.

Nonetheless, a SiC superjunction device works the same as its silicon counterpart. As stated, power semiconductors are vertical devices. The source and gate are on top of the device, while drain is on the bottom. A thin epi layer is in the middle.

In simple terms, a silicon-based superjunction power MOSFET has a thinner epi layer than traditional power MOSFETs. To make silicon-based superjunction power MOSFETs in the fab, you grow a few microns of silicon on the device, and then do an ion implantation step. You repeat the process until you have P and N superjunction columns, according to Warwick’s Gammon.

“These superjunction devices are much harder to make in SiC than in silicon,” Gammon said. “In SiC, you can only implant ~1um, so this would be an expensive and complex way to make them. So at Warwick, we are looking at a number of different approaches as to how to make them, either via sidewall implantation or via etching a trench and refilling it with CVD-grown SiC.”

In the paper from Warwick, researchers took the sidewall implantation route to make SiC superjunction Schottky diodes.In the lab, researchers used 4H-SiC as the substrate material. The substrate is 100μm in thickness. Then, a drift region thickness of 9μm is defined on the substrate to achieve a breakdown voltage greater than 2 kV. The drift or epi region is developed using an epitaxy process.

The next step is the development of a tiny trench in the structure. “The half-cell mesa-width (MW) is measured at the trench midpoint and fixed throughout the study at 2.1μm,” said Guy Baker from the University of Warwick, in the paper. Others contributed to the work.

Then, the device is activated using an ion implantation process. “P-columns are then created through implantation into the trench sidewalls,” Baker said in the paper. “A tilted implantation would form the p-pillars along the trench sidewall at an implantation depth of 200nm. A box-shaped implantation profile is assumed, using aluminum ions. The trenches are formed by ICP-RIE-etching and are passivated before being refilled with encapsulating dielectrics. A first grown layer of SiO2 is used on the trench sidewall to form a high-quality interface. The trench is filled using polyimide (PI). Metal contacts are formed on the top and bottom of the device. The device pitch is fixed at 4.2μm to ensure that the devices have comparable current densities.”

This process enables vertical 1700-V 4H-SiC superjunction Schottky diodes. “Throughout the study, the traditional SJ trade-off of maximizing VBD while minimizing Ron is kept in balance with a realizable ion implantation window. This method overcomes some of the complex fabrication challenges associated with the conventional SJ structures, and thus ensures practical realization of a future device,” Baker said.

Measuring SiC lifetimes
The Nagoya Institute of Technology has developed a non-destructive way of measuring the depth distribution of carrier lifetimes in bipolar SiC devices.

To measure carrier lifetimes, researchers have developed a technique called time-resolved free carrier absorption with intersectional lights (IL-TRFCA).

Today, the voltages for unipolar SiC devices are limited to somewhere below 3.3 kV, according to researchers from the Nagoya Institute of Technology. There are some challenges to extend the voltages. So, some are looking at bipolar SiC devices. These devices offer low on-resistance through conductivity modulation.

But carrier lifetimes present a challenge here. “Excessively long carrier lifetimes increase the switching losses, and this trade-off has to be appropriately balanced by accurately controlling the distribution of carrier lifetimes within the semiconductor,” according to researchers from the Nagoya Institute of Technology.

Therefore, it’s imperative to measure the carrier lifetime distribution of a semiconductor. For this, the most common method is a destructive technique, where you cut a sample and analyze a cross-section of the material.

Instead, the Nagoya Institute of Technology has devised an improved version of a non-destructive measurement–IL-TRFCA. Using this technique, researchers can measure the distribution of carrier lifetimes within the sample without the need to cut it.

Researchers made some modifications to the IL-TRFCA method. They adopted a larger incidence angle of 34° for both lasers and a higher numerical aperture in the objective lens and detector. These modifications resulted in enhanced depth resolution and also made it possible to use IL-TRFCA in thicker SiC layers.

Events
Do you want to learn more about IC packaging? The Electronics, Components and Technology Conference (ECTC) is the premier international packaging conference. ECTC 2021 will be held in virtual format. Special sessions and panels will have both a pre-recorded and a live component.

The conference will include over 350 technical papers organized into 46 topical sessions, where each session will be available as an on-demand webcast for the duration of the conference, which will open on Tuesday, 1 June and close on Sunday, 4 July. To learn more about the conference, go to the ECTC site. Registration is open.