Mask Complexity, Cost, And Change

Experts at the Table: As leading-edge lithography nodes push further into EUV and beyond, mask-making has become one of the most critical and costly aspects of semiconductor manufacturing. At the same time, non-EUV applications are stretching the lifetime of older tools and processes, challenging the industry to find new solutions for both ends of the spectrum. Semiconductor Engineering sat down to discuss these changes with Harry Levinson, principal lithographer at HJL Lithography; Aki Fujimura, CEO of D2S; Ezequiel Russell, senior director of mask technology at Micron; and Christopher Progler, executive vice president and CTO at Photronics. What follows are excerpts of that conversation.

L-R: HJL’s Levinson; D2S’ Fujimura; Micron’s Russell; Photronics’ Progler.

SE: What are the most significant mask-related challenges at the leading edge for both EUV and non-EUV lithography today?

Levinson: For EUV, the big issue is cost — the overall expense of making, maintaining, and replacing masks. There’s a huge price difference between optical and EUV masks over their lifetime. I don’t see that changing quickly, especially with the move to new absorbers that increase complexity. On the optical side, it’s still a cost issue, but of a different kind. Many older nodes are still using tools that were fully depreciated decades ago, and now those tools are reaching end of life. If you bring in a replacement tool that costs $20 million, and you depreciate that over five years, that’s $500 an hour added directly into mask costs. That’s a big deal for low-volume parts where you can’t amortize the cost across a lot of chips. That’s going to be a real problem for price-sensitive markets.

Fujimura: For EUV, everyone’s accepted that mask costs are going to be high. If you’re developing a new AI chip and trying to get VC funding, you’re not going to start with an EUV node. You’ll prove it out on something cheaper, maybe a 193i node, because you don’t have the volumes yet — even if you’re successful later. The ecosystem has figured this out and will use EUV for high-volume or extremely high-value products, accepting that masks will cost a lot. For non-EUV, the concept of ‘leading edge’ has really split, depending on the budget and the lithography limits you’re dealing with. For companies targeting non-EUV leading-edge nodes, the challenges are actually quite similar to EUV. You want to be as leading-edge as possible because you’re competing with others doing the same thing. Technologies like curvilinear masks apply across both EUV and non-EUV lithography, because everyone wants better patterning than the competition — even in 193 dry or 193 immersion nodes.

Russell: Cost is a major issue, especially with EUV. But from a memory perspective, one big factor is the lifetime of EUV reticles. It’s just not on par with DUV or immersion reticles. At Micron, using pellicles isn’t viable because of the throughput hit. That means we have to clean our masks more often, and we need duplicates to keep the scanners running while masks are inspected or cleaned. That shortens mask lifetimes and increases overall cost. Also, EUV scanners require higher doses for optimum pattern printing, so practical throughput is lower than spec. As dose is increased, the number of wafers per hour that the tool processes decreases linearly, which makes the entire litho step with EUV more expensive. If you have IP for pitch multiplication or other ways to pattern with immersion, EUV can be hard to justify on cost alone. For non-EUV reticles, the technology is quite mature, but as pattern specs tighten — CDU (critical dimension uniformity), registration, pattern placement — the cost goes up. Even though the features or materials may not have changed, tighter specs will lower yield and require more advanced writers and more repairs, which adds to cost.

Progler: With EUV, one of the key issues is the specialized tools, like actinic inspection tools that only work on EUV masks. These are very expensive, and since there aren’t many EUV masks running, the cost per use is high. That really drives up EUV mask cost. But I also want to highlight something else — cycle time. We’re seeing far more concern about mask delivery speed than about cost. If EUV is going to succeed more broadly, it needs to expand its user base. That only happens if we can reduce the time it takes to prototype and deliver new designs. Cycle time has become a bigger issue than cost for many of our customers. That’s true for both complex optical masks and EUV masks. We need faster delivery with greater assurance that what gets printed will work right the first time, because the whole process is so expensive.

SE: In EUV, is single patterning enough at the leading edge, or is multi-patterning still required?

Fujimura: For any given lithography technique, there’s always a toolkit of enhancement technologies available to push resolution and improve pattern fidelity. That includes multi-patterning. This isn’t about if multi-patterning will happen, but when. EUV will absolutely require multiple patterning in the future. And if we eventually go to high-NA, multi-patterning will be used to avoid needing hyper-NA, and so on. So companies will make different decisions depending on their tolerance for added steps and precision, but the need for EUV multi-patterning is definitely coming.

Russell: Micron has developed a lot of IP around multi-patterning, starting way back with KrF and then pushing out ArF adoption. That whole strategy was about extending immersion and delaying EUV. And we’ll do the same thing with EUV. We’ll extend it with multi-patterning. Right now, to my knowledge, all the nodes in high-volume production using EUV, both memory and logic, are doing single-patterning EUV. But every company in R&D, across both logic and memory, is working on some kind of EUV multi-patterning for their next node. Intel has been very vocal about using high-NA EUV at their 14A node, and that’s because single-patterning EUV won’t get them to spec. High-NA can help with cycle time or fab space constraints, even if it’s more expensive. But for most applications, half-field high-NA is going to struggle to compete with multi-patterned EUV on cost. All the techniques we used to extend immersion —  complex OPC, advanced illuminators, computational methods  —  are now being applied to EUV. Multi-patterning is inevitable.

Progler: I agree. Multi-patterning is a natural evolution. When you’re trying to get more value out of a low-NA EUV toolset, double-patterning makes a lot of sense. Rumor has it that the very first production EUV implementation was actually a double-patterned contact layer, because the resists at the time weren’t good enough to support single-patterning. So the idea isn’t new. It’s just about when and where it makes economic and technical sense to insert multi-patterning. Most of the pieces are in place already to support routine multi-patterning applications for EUV, although at a much higher price point. Similar to ArF, widespread adoption will require improvements in mask-friendly pattern decomposition methods, mask edge-placement specs, and most importantly, mask metrology and throughput. The mask patterning tools are in good shape, but high-speed 1D and 2D metrology, especially for masks, is still a big gap. That’s something we’ll need to solve if we’re going to scale EUV multi-patterning.

Levinson: We know how to do multi-patterning. But most of that experience in logic has been with uni-directional layouts. At the same time, system-level designers want to move toward more complex, even curvilinear shapes. There’s much less understanding of how to do multi-patterning with those kinds of designs. I remember early demonstrations of self-aligned multi-patterning for logic that were looking at two-directional patterns. The opportunities are there, but we’ve got a lot of learning to do. It’s not yet clear how well it’s going to work or how far we can push it.

SE: What developments in materials are most promising for EUV masks and wafer process control and yield? How are these evolving to support finer nodes?

Russell: We started with binary-type reflective masks in EUV and have migrated to attenuated, or low-n reflective masks. These improve image contrast, which directly reduces CD uniformity issues and line-width roughness in the final wafer resist patterns. There’s ongoing research into mask materials with different n and k values to optimize performance for specific pattern types or pitches. If the mask shop can support multiple blanks, there’s an opportunity to selectively match the absorber properties to different layers’ requirements for better imaging. On the resist side, lower-sensitivity resists, just like in DUV, allow for better pattern fidelity, especially with multi-pass writing. That improves placement accuracy and reduces line-edge variation. For wafers, metal oxide resists are one of the more revolutionary advances. They offer higher contrast and better etch resistance than traditional CARs (chemical amplified resists). Especially for contact and pillar layers, these could be enabling. But they still face challenges like defectivity, cost, and needing specialized deposition tools that don’t slot easily into high-volume manufacturing.

Progler: Customization of mask blank properties, adjusting absorber thickness or material properties, hasn’t really been pursued aggressively in the first generation of EUV. But it’s a big opportunity to expand level-specific wafer-process latitude. For example, we may need to move to aperiodic multilayers for high-NA. There’s room for tuning the mask blank stack for different imaging needs, and that wasn’t really explored early on. On the resist side, the mask market is small. There aren’t a lot of companies investing in new e-beam resists. Metal-containing resists could offer some new options, but the business case for developing them is tough without a bigger installed base. I’d like to see more competition and innovation here, but realistically, it will require sustained R&D investment in a niche market.

Levinson: Metal-oxide resists are definitely interesting. Their high optical absorption is a huge advantage. EUV resists need to be thin to avoid pattern collapse, so if you can absorb more photons in a thinner film, you gain in several ways — less statistical variation, lower required dose, and better imaging overall. At the most recent SPIE conference, there were papers looking beyond tin-based resists to other elements like tellurium and antimony. The idea is to get higher EUV absorption with new chemistries. On the mask side, 3D mask effects are a major problem, especially for wide pitch ranges and complex patterns. Absorbers and multilayer design could become levers to address that, but it’s still an area that needs more work.

Fujimura: Harry’s point on pellicles is important. For EUV, pellicle performance has a major impact on overall efficiency. It’s not a mask material per se, but transmission rate and durability both affect how well EUV lithography works. You don’t want to be swapping pellicles every week. That adds cost, requires inspection, and creates risk. Improving pellicle longevity is a key part of keeping the EUV mask ecosystem viable.

SE: What are some of the challenges with EUV pellicles today, and what can be done to improve their durability and performance?

Fujimura: Pellicles are fully accepted in 193i. Everyone uses them, they last a long time, and it’s all good. But EUV pellicles are where the issues come in. The two big factors are transmission rate and durability. With EUV, the masks are reflective. The light has to go through the pellicle, hit the mask, and then come back out, so you lose energy twice. These pellicles just don’t last long, either. You might need to replace them once a week. And every time you replace one, you have to inspect the mask again, because something could have gone wrong. That’s costly and time consuming. But even then, it’s still worth using EUV with or without pellicles, which speaks to how valuable EUV is despite the drawbacks.

Levinson: Ezekiel mentioned they’re not using pellicles at Micron because the transmission just isn’t high enough, and they lose too much scanner throughput. You might think 90% transmission sounds good, but with EUV the light goes through the pellicle twice. That means you’ve lost 20%, which is a significant hit.

Russell: It’s actually worse than that. The current generation of pellicles, polysilicon-based types, reflect deep ultraviolet (DUV) light from the source. That means you need a special filter called a DGL membrane to block the reflected DUV. That adds another 20% throughput loss, on top of what you already lose from the pellicle itself. So in most applications, it’s just not practical, especially if your design can tolerate some defects and you have the ability to repair. In those cases, skipping the pellicle is a no-brainer. There are other pellicles in development, like carbon nanotube-based versions. These don’t reflect DUV as much, and they have higher EUV transmission to begin with, so they wouldn’t need a DGL membrane. They could become more mainstream if we can make them reliable enough. But right now, they only last for fewer than 10,000 wafer exposures. And if they fail, they completely shatter into a million pieces inside the scanner. That’s a huge risk and a major downtime event. I don’t know of anyone using them in high-volume production yet, but there’s definitely active research.

Progler: Carbon nanotube pellicles seem promising and are moving closer to commercial use, but everything Ezekiel said holds. EUV pellicles are more complicated and take more abuse than 193i pellicles ever did. Removing and then reapplying new pellicles after mask cleaning or inspection is a routine part of mask services. The repel rate or wafer passes per repel for EUV is far worse compared to 193 immersion. And replacing a pellicle on an EUV mask is a much more costly and involved process. It affects everything — throughput, inspection, the time you spend managing the mask. There’s also a lack of standardization. Right now, each EUV mask supplier uses a different pellicle design and mounting method. That fragmentation makes it harder to mature the technology and scale it for widespread adoption.

Levinson: It really depends on the use case. If you’re building a large die like an 800 mm² GPU, you probably want a pellicle to avoid killer defects. But for memory applications with redundancy, it’s a different story. We’re seeing improvements on both sides. Pellicle manufacturers are boosting transmission and lifetime, and ASML has been cleaning up its act to reduce reticle contamination. But we’re still going to have to make tradeoffs based on the product type and risk tolerance.

Further reading:
Single Vs. Multi-Patterning Advancements For EUV
EUV patterning has come a long way in the past five years, but old challenges resurface with high-NA EUV.