Step Towards A 5G Software-Defined RAN Over A Fully Open-Source Parallel RISC-V Architecture (ETH Zurich)


A technical paper titled “Efficient Parallelization of 5G-PUSCH on a Scalable RISC-V Many-core Processor” was published by researchers at ETH Zurich.

Abstract (partial)
“5G Radio access network disaggregation and softwarization pose challenges in terms of computational performance to the processing units. At the physical layer level, the baseband processing computational effort is typically offloaded to specialized hardware accelerators. However, the trend toward software-defined radio-access networks demands flexible, programmable architectures. In this paper, we explore the software design, parallelization and optimization of the key kernels of the lower physical layer (PHY) for physical uplink shared channel (PUSCH) reception on MemPool and TeraPool, two manycore systems having respectively 256 and 1024 small and efficient RISC-V cores with a large shared L1 data memory. PUSCH processing is demanding and strictly time-constrained, it represents a challenge for the baseband processors, and it is also common to most of the uplink channels. Our analysis thus generalizes to the entire lower PHY of the uplink receiver at gNodeB (gNB).”

Find the technical paper here. Published October 2022.

Bertuletti, Marco, et al. “Efficient Parallelization of 5G-PUSCH on a Scalable RISC-V Many-core Processor.” arXiv preprint arXiv:2210.09196 (2022).

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