Research Bits: Jan. 16


3D stacking of 2D materials Researchers from Penn State University demonstrated monolithic 3D integration with 2D transistors made from 2D semiconductors called transition metal dichalcogenides. The 2D materials have unique electronic and optical properties, including sensitivity to light, making them ideal for use as sensors. “One challenge is the process temperature ceiling of 450 degre... » read more

Big Shifts At Very Small Geometries


The number of changes across the semiconductor industry are accelerating and widening. There are more innovations, in more places, and in more applications. What follows is a small peek at just how many significant changes are afoot, where they are happening, and who's getting recognized for their efforts. Quantum computing, but hold the math The modern electronics industry rests on multip... » read more

Advancing 3D Integration


Jerry Tzou's recent presentation on 3D Fabric Technology was all about More than Moore. TSMC has other specialized technologies such as RF and eNVM, but this is a general foundational technology for hyperscale data centers, mobile, and AI. Jerry started with the motivation for using chiplets and heterogeneous chip integration. You can see in the diagram below on the left where die from node... » read more

Acoustic Metrology for Fine Pitch Microbumps in 3D IC


The continuing shift to 3D integration requires formation of electrical interconnects between multiple vertically stacked Si devices to enable high speed, high bandwidth connections. Microbumps and through silicon vias (TSVs) enable the high-density interconnects for die-to-die and die-to-wafer stacking for different applications. In this paper, we present acoustic metrology techniques for the ... » read more

Temporary Bonding: Enabling the Next Generation of Ultrathin Wafers


Innovative materials are critical for maintaining integrity during advanced semiconductor manufacturing processes. Temporary bonding is being enabled by these new materials and is making a name for itself in the next generation of ultrathin wafer manufacturing. Semiconductor wafers are being forced to become thinner as the push to shrink feature sizes and introduce full-scale 3D integration ... » read more

It’s a Materials World, With Positive Forecast


By Michael Fury What’s the latest in materials forecasts for ALD/CVD precursors, CMP consumables, electronic gases, silicon wafers and sputtering targets? Techcet gives us an update. Metal Gate and Electrode Precursors to Double in Five Years Use of front-end Ta and W metal gate and Hf gate dielectric precursors will grow over 2.5x by 2020, according to a new report from Techcet, “20... » read more

3D Integration


By Katherine Derbyshire It’s a central problem of integrated circuit scaling. While transistor delay goes down along with channel length, interconnect delay goes up. The 90 nm technology node featured a transistor delay of about 1.6 ps, while a 1 mm long interconnect wire added about 5x102 ps. For the 22 nm node, the ITRS estimates transistor delay at 0.4 ps, but interconnect delay at abou... » read more