3D NAND Needs 3D Metrology


By Nick Keller and Andy Antonelli You’ve read the reports: the memory market is floundering as the semiconductor industry moves through another scarcity/surplus cycle. Be that as it may, innovation is happening as the industry continues to pursue increasingly higher three-dimensional stacks, with 3D NAND stacks taller than 200 layers entering production. However, there are challenges... » read more

Demonstrating The Capabilities Of Virtual Wafer Process Modeling And Virtual Metrology


A technical paper titled “Review of virtual wafer process modeling and metrology for advanced technology development” was published by researchers at Coventor Inc., Lam Research. Abstract: "Semiconductor logic and memory technology development continues to push the limits of process complexity and cost, especially as the industry migrates to the 5 nm node and beyond. Optimization of the p... » read more

Week In Review: Semiconductor Manufacturing, Test


Applied Materials sued its Chinese-owned rival, Mattson, over an alleged 14-month effort to steal valuable trade secrets, reports Bloomberg. In court filing, Applied Materials claimed that Mattson engaged in a spree of employee-poaching and covertly transferring semiconductor equipment designs. Global semiconductor materials revenue grew 8.9% to $72.7 billion in 2022, surpassing the previous... » read more

3D Memory Structures: Common Hole And Tilt Metrology Techniques and Capabilities


A technical paper titled "Inline metrology of high aspect ratio hole tilt and center line shift using small-angle x-ray scattering" was published by researchers at Bruker Nano and Lam Research. Abstract: "High aspect ratio (HAR) structures found in three-dimensional nand memory structures have unique process control challenges. The etch used to fabricate channel holes several microns deep... » read more

Etch Processes Push Toward Higher Selectivity, Cost Control


Plasma etching is perhaps the most essential process in semiconductor manufacturing, and possibly the most complex of all fab operations next to photolithography. Nearly half of all fab steps rely on a plasma, an energetic ionized gas, to do their work. Despite ever-shrinking transistor and memory cells, engineers continue to deliver reliable etch processes. “To sustainably create chips... » read more

How Metrology Tools Stack Up In 3D NAND Devices


Multiple innovations in semiconductor processing are needed to enable 3D NAND bit density increases of about 30% per year at ever-decreasing cost per bit, all of which will be required to meet the nonvolatile storage needs of the big data era. 3D NAND is the first truly three-dimensional device in production. It is both a technology driver for new metrology methods and a significant part of ... » read more

CDSAXS Milestones And Future Growth of X-ray-Based Metrology for 3D Nanostructures Important To Chip Industry


A new technical paper titled "Review of the key milestones in the development of critical dimension small angle x-ray scattering at National Institute of Standards and Technology." Abstract: "An x-ray scattering based metrology was conceived over 20 years ago as part of a collaboration between National Institute of Standards and Technology (NIST) and International Business Machines Corporat... » read more

Tech Forecast: Fab Processes To Watch Through 2040


The massive proliferation of semiconductors in more markets, and more applications within those markets, is expected to propel the industry to more than $1 trillion by 2030. But over the next 17 years, semiconductors will reach well beyond the numbers, changing the way people work, how they communicate, and how they measure and monitor their health and well-being. Chips will be the enabling ... » read more

Metrology Strategies For 2nm Processes


Metrology and wafer inspection processes are changing to keep up with evolving and new device applications. While fab floors still have plenty of OCD tools, ellipsometers, and CD-SEMs, new systems are taking on the increasingly 3D nature of structures and the new materials they incorporate. For instance, processes like hybrid bonding, 3D NAND flash devices, and nanosheet FETs are pushing the bo... » read more

Process Innovations Enabling Next-Gen SoCs and Memories


Achieving improvements in performance in advanced SoCs and packages — those used in mobile applications, data centers, and AI — will require complex and potentially costly changes in architectures, materials, and core manufacturing processes. Among the options under consideration are new compute architectures, different materials, including thinner barrier layers and those with higher th... » read more

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