tag: 3D NAND

3D NAND Virtual Process Troubleshooting And Investigation
By Brett Lowe - 18 Aug, 2022 - Comments: 0

Modern semiconductor processes are extremely complicated and involve thousands of interacting individual process steps. During the development of these process steps, roadblocks and barriers are often encountered in the form of unanticipated negative interactions between upstream and downstream process modules. These barriers can create a long delay in the development cycle and increase costs. ... » read more

How Overlay Keeps Pace With EUV Patterning
By Laura Peters - 09 Aug, 2022 - Comments: 1

Overlay metrology tools improve accuracy while delivering acceptable throughput, addressing competing requirements in increasingly complex devices. In a race that never ends, on-product overlay tolerances for leading-edge devices are shrinking rapidly. They are in the single-digit nanometer range for the 3nm generation (22nm metal pitch) devices. New overlay targets, machine learning, and im... » read more

Improving Yield With Machine Learning
By Laura Peters - 12 Jul, 2022 - Comments: 0

Machine learning is becoming increasingly valuable in semiconductor manufacturing, where it is being used to improve yield and throughput. This is especially important in process control, where data sets are noisy. Neural networks can identify patterns that exceed human capability, or perform classification faster. Consequently, they are being deployed across a variety of manufacturing proce... » read more

Keeping IC Packages Cool
By Laura Peters and Karen Heyman - 07 Jun, 2022 - Comments: 0

Placing multiple chips into a package side-by-side can alleviate thermal issues, but as companies dive further into die stacking and denser packaging to boost performance and reduce power, they are wrestling with a whole new set of heat-related issues. The shift to advanced packaging enables chipmakers to meet demands for increasing bandwidth, clock speeds, and power density for high perform... » read more

Selective etching of silicon nitride over silicon oxide using ClF3 /H2 remote plasma
By Technical Paper Link - 18 Apr, 2022 - Comments: 0

Researchers from Sungkyunkwan University, MIT and others present an option for selective etching. Abstract "Precise and selective removal of silicon nitride (SiNx) over silicon oxide (SiOy) in a oxide/nitride stack is crucial for a current three dimensional NOT-AND type flash memory fabrication process. In this study, fast and selective isotropic etching of SiNx over SiOy has been investiga... » read more

Week In Review: Manufacturing, Test
By Linda Christensen - 15 Apr, 2022 - Comments: 0

Photonic Chips Go Big In Europe PhotonDelta, a collaborative end-to-end supply chain for the application of photonics chips, secured €1.1 billion in conditional funding for a six-year initiative. Investments from the Netherlands government and other organizations “will be used to build 200 startups, scale up production, create new applications for photonic chips, and develop infrastructure... » read more

Critical Moves: Advanced Logic Devices And CIS Benefit From Applications Using IRCD Metrology
By Nick Keller - 08 Feb, 2022 - Comments: 1

As 3D NAND continues to scale vertically — all in the name of increasing capacity and speed and reducing inefficiency and cost — maintaining channel hole critical dimension (CD) and shape uniformity becomes even more challenging. Faced with rising high-aspect ratios, addressing these challenges requires new inline non-destructive metrology to provide real-time process control. Infrared crit... » read more

Non-destructive Thickness Characterisation of 3D Multilayer Semiconductor Devices Using Optical Spectral Measurements and Machine Learning
By Technical Paper Link - 07 Feb, 2022 - Comments: 0

Abstract: "Three-dimensional (3D) semiconductor devices can address the limitations of traditional two-dimensional (2D) devices by expanding the integration space in the vertical direction. A 3D NOT-AND (NAND) flash memory device ispresently the most commercially successful 3D semiconductor device. It vertically stacks more than 100 semiconductor material layers to provide more storage capac... » read more

Outlook: DRAM, NAND, Next-Gen Memory
By Mark LaPedus - 18 Nov, 2021 - Comments: 0

Jim Handy, director at Objective Analysis, sat down with Semiconductor Engineering to talk about the 3D NAND, DRAM and next-generation memory markets. What follows are excerpts of that discussion. SE: How would you characterize the NAND market thus far in 2021? Handy: All chips are seeing unusual strength in 2021, but NAND flash and DRAM are doing what they usually do by exhibiting more e... » read more

More Errors, More Correction in Memories
By Bryon Moyer - 09 Nov, 2021 - Comments: 1

As memory bit cells of any type become smaller, bit error rates increase due to lower margins and process variation. This can be dealt with using error correction to account for and correct bit errors, but as more sophisticated error-correction codes (ECC) are used, it requires more silicon area, which in turn drives up the cost. Given this trend, the looming question is whether the cost of ... » read more

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