Searching For Power Bugs


How much power is your design meant to consume while performing a particular function? For many designs, getting this right may separate success from failure, but knowing that right number is not as easy as it sounds. Significant gaps remain between what power analysis may predict and what silicon consumes. As fast as known gaps are closed, new challenges and demands are being placed on the ... » read more

Unleashing The World’s Technology Potential


A year ago, as I prepared for my opening keynote at Arm TechCon, our biggest annual ecosystem gathering, we were already debating the event’s future focus. Complexity was driving new technology paths as we looked at how we’d engineer a global network of AI, IoT and 5G-driven devices from chip to cloud. We knew that dealing with that complexity would require fundamental changes in our techno... » read more

Confusion Grows Over Packaging And Scaling


The push toward both multi-chip packaging and continued scaling of digital logic is creating confusion about how to classify designs, what design tools work best, and how to best improve productivity and meet design objectives. While the goals of design teams remains the same — better performance, lower power, lower cost — the choices often involve tradeoffs between design budgets and ho... » read more

Blog Review: Oct. 14


Arm's Hongsup Shin explains a machine learning application that can determine which tests are most likely to find hardware bugs, improving efficiency and reducing the number of tests that need to be run. Synopsys' Pieter van der Wolf and Dmitry Zakharov take a look at the increasing need for low power processors optimized for machine learning tasks as IoT, smart home, and wearable devices pr... » read more

Week In Review: Design, Low Power


Arm spun out Cerfe Labs to develop and license new types of non-volatile memories based on correlated electron materials (CeRAM) and ferroelectric transistors (FeFETs). Arm CeRAM researchers will join Cerfe Labs and assume ownership of the Arm joint development project with Symetrix Corporation. Read more about the new company and its technology in Cerfe Labs: Spin-On Memory. Tools & IP ... » read more

Week In Review: Auto, Security, Pervasive Computing


Security A new certification program for hardware verification engineers from Edaptive Computing Inc (ECI) and OneSpin Solutions promises to help companies meet IC integrity standards for SoC designs for 5G, IoT, AI, automotive, industrial, defense, and avionics. These designs are often complex, with a variety of elements, such as programmable logic and different cores. The OneSpin Formal Veri... » read more

HW Security Better, But Attack Surface Is Growing


Semiconductor Engineering sat down to discuss security on chips with Vic Kulkarni, vice president and chief strategist at Ansys; Jason Oberg, CTO and co-founder of Tortuga Logic; Pamela Norton, CEO and founder of Borsetta; Ron Perez, fellow and technical lead for security architecture at Intel; and Tim Whitfield, vice president of strategy at Arm. What follows are excerpts of that conversation,... » read more

Blog Review: Oct. 7


In a blog for Arm, University of Southampton PhD student Sivert Sliper looks at how energy-driven and intermittent computing could be used to power trillions of IoT devices and introduces a SystemC-based simulator for such systems. Mentor's Chris Spear explains why transaction classes should extend from uvm_sequence_item rather than uvm_transaction when designing UVM testbenches. Cadence'... » read more

Good Vs. Bad Acquisitions


M&A activity is beginning to heat up across the semiconductor industry, fueled by high market caps, low interest rates, and a slew of startups with innovative technology and limited market reach. Some of these deals are gigantic, such as the pending acquisition of Arm by Nvidia, and the proposed purchase of Maxim Integrated by Analog Devices. Others are more modest, such as Arteris IP's ... » read more

RISC-V: Will There Be Other Open-Source Cores?


Part 3: Semiconductor Engineering sat down to discuss the business and technology landscape for RISC-V with Zdenek Prikryl, CTO of Codasip; Helena Handschuh, a Rambus Security Technologies fellow; Louie De Luna, director of marketing at Aldec; Shubhodeep Roy Choudhury, CEO of Valtrix Systems; and Bipul Talukdar, North America director of applications engineering at SmartDV. What follows are exc... » read more

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