Will Monolithic 3D DRAM Happen?


As DRAM scaling slows, the industry will need to look for other ways to keep pushing for more and cheaper bits of memory. The most common way of escaping the limits of planar scaling is to add the third dimension to the architecture. There are two ways to accomplish that. One is in a package, which is already happening. The second is to sale the die into the Z axis, which which has been a to... » read more

Blog Review: Sept. 8


Synopsys' Scott Durrant considers the IP used in HPC SoCs and the efforts to simultaneously minimize data movement and maximize the speed at which data is transferred from one location to another, whether that data transfer is across long distances or from one chip to another within a server. Cadence's Paul McLellan looks into a new version of the Rowhammer DRAM vulnerability that can allow ... » read more

Why TinyML Is Such A Big Deal


While machine-learning (ML) development activity most visibly focuses on high-power solutions in the cloud or medium-powered solutions at the edge, there is another collection of activity aimed at implementing machine learning on severely resource-constrained systems. Known as TinyML, it’s both a concept and an organization — and it has acquired significant momentum over the last year or... » read more

Blog Review: Sept. 1


Arm's Fernando Garcia Redondo, Pranay Prabhat, and Mudit Bhargava continue their exploration of MRAM simulation by explaining stochasticity experiments and a characterization framework that focuses on the MRAM behavior statistical analysis. Siemens EDA's Neil Johnson shows how performance profiling can be used to identify testbench code that could slow down simulation and when to start using i... » read more

Week In Review: Design, Low Power


The UK's Competition and Markets Authority is raising new challenges for Nvidia's proposed acquisition of Arm, suggesting in a new report that an in-depth Phase 2 investigation into the deal is warranted on competition grounds. Andrea Coscelli, chief executive of the CMA, said, “We’re concerned that Nvidia controlling Arm could create real problems for Nvidia's rivals by limiting their acce... » read more

New Approaches For Processor Architectures


Processor vendors are starting to emphasize microarchitectural improvements and data movement over process node scaling, setting the stage for much bigger performance gains in devices that narrowly target what end users are trying to accomplish. The changes are a recognition that domain specificity, and the ability to adjust or adapt designs to unique workloads, are now the best way to impro... » read more

Blog Review: Aug. 25


Arm's Fernando Garcia Redondo, Pranay Prabhat, and Mudit Bhargava introduce an open source framework and compact model for the simulation, characterization, and analysis of MRAM magnetic tunnel junctions. Siemens EDA's Chris Spear continues the tutorial on SystemVerilog class variables with a look at how to use the $cast() system task to copy between base and derived class variables. Syno... » read more

A Compact Model For Scalable MTJ Simulation


Read the full technical paper. Published June 9, 2021. Abstract This paper presents a physics-based modeling framework for the analysis and transient simulation of circuits containing Spin-Transfer Torque (STT) Magnetic Tunnel Junction (MTJ) devices. The framework provides the tools to analyze the stochastic behavior of MTJs and to generate Verilog-A compact models for their simulation in lar... » read more

Week In Review: Auto, Security, Pervasive Computing


Security Infineon Technologies is coordinating a group of twelve partners, including researchers, electronics industry, and end users, who are working to find and fix IoT security flaws. The research project, called “Design methods and hardware/software co-verification for the unique identifiability of electronic components” falls under VE-VIDES, which is part of the Trustworthy Electronic... » read more

Blog Review: Aug. 18


Arm's Charlotte Christopherson explores the possibilities of flexible, non-silicon electronics with the creation of PlasticArm, an ultra-minimalist Cortex-M0-based SoC that, even with just 128 bytes of RAM and 456 bytes of ROM, is twelve times more complex than previous flexible electronics. Cadence's Claire Ying highlights the importance of integrity and data encryption (IDE) technology for... » read more

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