Blog Review: Sept. 9


Mentor's Jacob Wiltgen considers the recent advances in safety critical engineering and how automated the lifecycle can become, where tools form a set of checks and balances to ensure the accuracy of results. Cadence's Paul McLellan finds out what's new at TSMC, including a new R&D center, fab construction, capacity increases for existing nodes, and what the company sees for beyond its N... » read more

A Performance Analysis Of The First Generation Of HPC‐Optimized Arm Processors


In this paper, the authors present performance results from Isambard, the first production supercomputer to be based on Arm CPUs that have been optimized specifically for HPC. Isambard is the first Cray XC50 “Scout” system, combining Cavium ThunderX2 Arm‐based CPUs with Cray's Aries interconnect. The full Isambard system contained over 10,000 Arm cores. In this work, we present node‐lev... » read more

Making Everything Linux-Capable


It's not clear how the edge will play out or what will be the winning formula from a hardware standpoint. But for everything beyond the end device, and possibly even including the end device, a key prerequisite will be the ability to run Linux. That means at least one processor or core within the hardware will need to run 64-bit software. In addition, systems will need to have enough storage... » read more

Week In Review: Design, Low Power


Tools & IP Arm unveiled the Cortex-R82, a 64-bit, Linux-capable Cortex-R processor targeted for next-generation enterprise and computational storage solutions. The Cortex-R82 provides 2x performance depending on workload compared to previous Cortex-R generations and provides access of up to 1TB of DRAM for advanced data processing in storage applications. It offers an optional memory manag... » read more

Week In Review: Auto, Security, Pervasive Computing


AI on edge Cadence’s Tensilica Vision P6 DSP IP will be in Kneron’s KL720, a 1.4TOPS AI system-on-chip (SoC) targeted for AI of things (AIoT), smart home, smart surveillance, security, robotics and industrial control applications. Arm announced its Arm Cortex-R82, a 64-bit, Linux-capable Cortex-R processor for enterprise and computational storage systems. The processor is designed to pr... » read more

All-in-One Vs. Point Tools For Security


Security remains an urgent concern for builders of any system that might tempt attackers, but designers find themselves faced with a bewildering array of security options. Some of those are point solutions for specific pieces of the security puzzle. Others bill themselves as all-in-one, where the whole puzzle filled in. Which approach is best depends on the resources you have available and y... » read more

Blog Review: Sept. 2


Arm's Pranay Prabhat highlights research into zero-power or low-power sensing devices and work toward designing a microcontroller that could fit with DARPA N-ZERO sensors. Mentor's Shivani Joshi provides a primer on the ODB++ standard data exchange file format that generates PCB design data files for use in fabrication, assembly, and test. Cadence's Paul McLellan shares some highlights fr... » read more

Week In Review: Manufacturing, Test


Trade As reported, the U.S. recently implemented more restrictions on U.S. chip sales to Huawei. In response, SEMI has released the following statement in response to the new export control rule changes announced by the U.S. Commerce Department: “SEMI recognizes the role of export control measures to address threats to U.S. national security. However, we are very concerned the new export ... » read more

Week In Review: Auto, Security, Pervasive Computing


Pervasive computing — data center, edge, IoT Marvell is working on silicon for the data infrastructure market using TSMC’s 5nm process node. Marvell says it has multiple designs already under contract for its 5nm portfolio across the carrier, enterprise, automotive, and data center markets. The first products are sampling by the end of next year.  Ansys’ multiphysics signoff tools, R... » read more

RISC-V’s Expanding Footprint


Zdenek Prikryl, CTO of Codasip, sat down with Semiconductor Engineering to talk about the RISC-V market, where this open instruction set architecture (ISA) is gaining ground, and what are the biggest challenges in working with this technology. SE: Where do you see the value in RISC-V? Is it for off-the-shelf processors or more customized components? Prikryl: A few years ago, RISC-V was us... » read more

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