tag: analog

Fusing CMOS IC And MEMS Design For IoT Edge Devices
By Mentor, a Siemens Business - 11 Sep, 2017 - Comments: 0

Creating a sensor-based IoT edge device is challenging, due to the multiple design domains involved (Analog, digital, RF, and MEMS). But, creating an edge device that combines the electronics using the traditional CMOS IC flow and a MEMS sensor on the same silicon die can seem impossible. In fact, many IoT edge devices combine multiple dies in a single package, separating electronics from the M... » read more

IP Biz Changes As Markets Fragment
By Ed Sperling - 22 Aug, 2017 - Comments: 0

Semiconductor Engineering sat down to discuss IP protection, tracking and reuse with Srinath Anantharaman, CEO of [getentity id="22203" e_name="ClioSoft"]; Jeff Galloway, CTO of Silicon Creations; Marc Greenberg, group director of product marketing for [getentity id="22032" e_name="Cadence"]'s IP Group; and John Koeter, vice president of marketing for [getentity id="22035" e_name="Synopsys"]' S... » read more

Tech Talk: Smart Manufacturing
By Ed Sperling - 17 Aug, 2017 - Comments: 0

Tom Salmon, vice president of collaborative technology platforms at SEMI, examines the electronics supply chain and what the industry organization is doing to pull all of the pieces together. https://youtu.be/jWX9mayMaZo Related Stories Smart Manufacturing Gains Momentum Problems remain for legacy infrastructure, but adoption will continue to grow as gaps are identified and plugged. ... » read more

Rethinking Computing Fundamentals
By Ed Sperling - 10 Aug, 2017 - Comments: 0

New compute architectures—not just new chips—are becoming a common theme in Silicon Valley these days. The whole semiconductor industry is racing to find the fastest, cheapest, lowest-power approach to processing. The drivers of this shift are well documented. Moore's Law is slowing down, in part because it's becoming more difficult to route signals across an SoC at the latest process no... » read more

A Tale of Two Testers
By Jeff Dorsch - 07 Aug, 2017 - Comments: 0

David Tacelli, president and CEO of Xcerra, was excited. His company’s reception for customers (and the press) at the Trou Normand restaurant in San Francisco’s hip South of Market neighborhood was going very well. Gourmet salames and other tasty foods were on offer, along with fine wines and craft ales and beers. He gleefully pointed out to editors that the product to be introduced at t... » read more

Finally, A Painless Solution For Analog Verification Management
By Mentor, a Siemens Business - 03 Aug, 2017 - Comments: 0

Usually, teams manage analog simulations manually or they use complex and expensive tools that require intricate setup and proprietary test plans before they can be deployed. What teams need is an easy way to manage analog verification in order to track the large number of simulations for each project. Tracking simulation results at all levels for each team member and project managers requires ... » read more

Re-Using IP In Packaging
By Ed Sperling - 10 Jul, 2017 - Comments: 0

For the past decade, the promise held forth by advanced packaging was that it would allow chipmakers to mix and match analog and digital IP without worrying about the process node at which they were developed or the physical interactions between components. This is a big deal when it comes to analog. Analog IP doesn't benefit from node shrinking the way digital logic does, and in many cases ... » read more

Funding China’s 200mm Fabs
By Clark Tseng - 07 Jul, 2017 - Comments: 0

China’s ambitious plans to build a world-class semiconductor manufacturing supply chain domestically certainly has the industry’s attention. With over a dozen new 300mm fab announcements lately from Foundries, DRAM, 3D NAND, and as well as CMOS image sensor companies (either from international semiconductor makers or from indigenous players), China has launched a huge investment in wafer fa... » read more

Monday At DAC
By Brian Bailey - 20 Jun, 2017 - Comments: 1

The 54th DAC got started today in a very steamy Austin. While we may be a maturing industry, there is certainly no indications that the people within the industry have given up or intend to take it easy. The event really got started late Sunday when Laurie Balch, chief analyst for Gary Smith EDA, delivered her message. She said that the focus is becoming the verticals. "This change in focus is ... » read more

Modeling On-Chip Variation At 10/7nm
By Ann Mutschler - 14 Jun, 2017 - Comments: 1

Simulation, a workhorse tool for semiconductor design, is running out of steam at 10/7nm. It is falling behind on chips with huge gate counts and an enormous number of possible interactions between all the different functions that are being crammed onto a die. At simulation's root is some form of SPICE, which has served as its underpinnings ever since SPICE was first published 44 years ago. ... » read more

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