tag: EDA

Making Tradeoffs With AI/ML/DL
By Ann Mutschler - 11 May, 2023 - Comments: 0

Machine learning, deep learning, and AI increasingly are being used in chip design, and they are being used to design chips that are optimized for ML/DL/AI. The challenge is understanding the tradeoffs on both sides, both of which are becoming increasingly complex and intertwined. On the design side, machine learning has been viewed as just another tool in the design team's toolbox. That's s... » read more

Engineering Simulation Workloads And The Rise of the Cloud
By Ansys - 10 May, 2023 - Comments: 0

Cloud service providers (CSPs) continue to improve the performance capabilities of their non-accelerated and accelerated compute instances, as well as augment their HPC infrastructure with domain-area expertise of targeted HPC workloads. Additionally, engineers, researchers, and scientists are becoming more comfortable with the types of workloads that can be run in the cloud within acceptable w... » read more

Accelerating Coverage Closure With AI-Based Verification Space Optimization
By Synopsys - 03 May, 2023 - Comments: 0

Coverage is at the heart of all modern semiconductor verification. There is no maxim more fundamental to this process than “if you haven’t exercised it, you haven’t verified it.” Although covering a particular aspect of a chip design does not guarantee that all bugs are found — bug effect propagation and checker quality are also key factors — it is certainly true that bugs cannot po... » read more

EDA Posts Q4 2022 Revenue of $3.9B
By Ann Mutschler - 01 May, 2023 - Comments: 0

The ESD Alliance, a SEMI Technology Community, announced today in its latest Electronic Design Market Data (EDMD) report that the Electronic System Design (ESD) industry revenue increased 11.3% from $3.47 billion in the fourth quarter of 2021 to $3.86 billion in the fourth quarter of 2022. The four-quarter moving average, which compares the most recent four quarters to the prior four, rose 12.6... » read more

AI Adoption Slow For Design Tools
By Brian Bailey - 01 May, 2023 - Comments: 0

A lot of excitement, and a fair amount of hype, surrounds what artificial intelligence (AI) can do for the EDA industry. But many challenges must be overcome before AI can start designing, verifying, and implementing chips for us. Should AI replace the algorithms in use today, or does it have a different role to play? At the end of the day, AI is a technique that has strengths and weaknesses... » read more

Can AI Write RTL?
By Brian Bailey - 01 May, 2023 - Comments: 1

Just a few months ago, generative AI was just a promise about what would be possible in the future. Today, nearly everyone with an ounce of curiosity has tried ChatGPT. Most people appear to be somewhat impressed with what it can do, but at the same time see the limitations that it has. As Dean Drako, founder of several companies, told me: "Recently, I needed to write a patent. I described t... » read more

EDA Makes A Frenzied Push Into Machine Learning
By Ed Sperling - 27 Apr, 2023 - Comments: 0

Machine learning is becoming a competitive prerequisite for the EDA industry. Big chipmakers are endorsing and demanding it, and most EDA companies are deploying it for one or more steps in the design flow, with plans to add much more over time. In recent weeks, the three largest EDA vendors have made sweeping announcements about incorporating ML into their tools at their respective user eve... » read more

How Chip Engineers Plan To Use AI
By Ed Sperling - 19 Apr, 2023 - Comments: 0

Experts at the Table: Semiconductor Engineering sat down to discuss how AI is being used today and how engineers expect to use it in the future, with Michael Jackson, corporate vice president for R&D at Cadence; Joel Sumner, vice president of semiconductor and electronics engineering at National Instruments; Grace Yu, product and engineering manager at Meta; and David Pan, professor in the ... » read more

Do Necessary Tools Exist For RISC-V Verification?
By Brian Bailey - 30 Mar, 2023 - Comments: 0

Semiconductor Engineering sat down to discuss the verification of RISC-V processors with Pete Hardee, group director for product management at Cadence; Mike Eftimakis, vice president for strategy and ecosystem at Codasip; Simon Davidmann, founder and CEO of Imperas Software; Sven Beyer, program manager for processor verification at Siemens EDA; Kiran Vittal, senior director of alliances partner... » read more

RISC-V Disrupting EDA
By Brian Bailey - 23 Mar, 2023 - Comments: 3

The electronic design automation (EDA) industry started in the 1980s and primarily was driven by the test and PCB industries. The test industry was focused on simulation so that test vector sets could be developed and optimized. The PCB industry needed help managing complexity as system sizes grew. That complexity soon was eclipsed by IC complexity and the costs associated with making a mist... » read more

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