Executive Briefing: Getting Direct On Litho


Semiconductor Engineering sat down and talked with David Lam, principal of the David Lam Group, an investment and advisory firm. Lam is also the chairman of Multibeam, a multi-beam equipment startup for direct-write lithography and other applications. He founded Lam Research in 1980 and left as an employee in 1985. He served on Lam Research’s board for five years after that. SE: Multibeam ... » read more

Challenges Mount For EUV Masks


ASML Holding’s first production-worthy scanners for extreme ultraviolet (EUV) lithography are expected to ship this year, but there are still a number of challenges to bring the technology into high-volume manufacturing. As before, the three main challenges for EUV are the power sources, resists and photomasks. To date, the resists are making progress, while the EUV power sources remain a ... » read more

The Brave New World Of FinFETs


SoCs using 16nm and 14nm finFETs are expected to begin rolling out next year using a 20nm back-end-of-line process. While the initial performance and power numbers are looking very promising, the challenges of designing and building these complex chips are daunting—and there are more problems on the way. First, the good news. Initial results from foundries show a 150% improvement in perfor... » read more

Risk Vs. Reward


One of the most persistent business myths is that deep pockets in challenging times always win in the end. While that has proven a successful model in many industries where the barrier to entry is enormous and rising, in the technology world the outcome isn’t always what you’d expect even with those same variables. In fact, the history of technology is littered with former business giant... » read more

Litho Roadmap Remains Cloudy


By Mark LaPedus For some time, the lithography roadmap has been cloudy. Optical lithography has extended much further than expected. And delays with the various next-generation lithography (NGL) technologies have forced the industry to re-write the roadmap on multiple occasions. Today, there is more uncertainty than ever in lithography. Until recently, for example, leading-edge logic chipma... » read more

Mask Data Prep Issues Compounding At 20nm


By Ann Steffora Mutschler When it comes to mask data prep—the step in the design and manufacturing flow that occurs just after optical proximity correction (OPC)—challenges have continued to rise with the subsequent moves to smaller geometries. This is driven by the scaling demands of delivering about a 50% area shrink from node to node on a two-year cycle, and thus dictates the lithog... » read more

The Impact Of 14-nm Photomask Uncertainties on Computational Lithography Solutions


Computational lithography solutions rely upon accurate process models to faithfully represent the imaging system output for a defined set of process and design inputs. These models, in turn, rely upon the accurate representation of multiple parameters associated with the scanner and the photomask. While certain system input variables, such as scanner numerical aperture, can be empirically tuned... » read more

Manufacturing Bits: Sept. 3


Dancing With The Stars In telescopes, the ability to see distant stars and galaxies is driven by the light-gathering area and detectors in the system. In the last 50 years, the collecting area in large-scale telescopes has increased by only a factor of four, according to researchers from the University of California at Santa Barbara. Meanwhile, the sensitivity of CCD detectors has increased... » read more

I Just Want Closure!


By Jean-Marie Brunet We all know it by now, but let’s say it one more time for the cameras—the level of complexity of closure at 20 nm and below is considerably higher than for any previous nodes. While the migration of manufacturing requirements into design started with a few suggested activities at 65 nm, such as recommended rules compliance, lithography checks, and critical area analysi... » read more

Can Mask Data Prep Tools Manage Data Glut?


By Ann Steffora Mutschler The trend to reduce critical dimension sizes has in turn increased design file sizes, especially with the addition of optical proximity correction (OPC) steps. This extra data translates to a bigger burden to be processed downstream in the flow on the way to the mask writer. At 28nm, design post-OPC data files sizes reach hundreds of gigabytes. With 20nm and below ... » read more

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