Tech Talk: Multipatterning, Take Two


Mentor Graphics' David Abercrombie continues with his whiteboard talk about coloring with advanced lithography, including what goes wrong and how to fix it. [youtube vid=HCBtvHCcbf4] » read more

Blog Review: March 26


Synopsys’ Eric Huang has discovered a video of Superman using a GoPro camera (scroll down to bottom of page). So this is what it’s like to stop bullets with your hand. Cadence’s Tom Hackett zeroes in on mobile interfaces in a video—SoC fabric, memory and chip-to-chip. Nice whiteboard drawing. Mentor’s Anil Khanna looks at a methodology for developing high-performance embedded so... » read more

Litho Is Out Of Sync


EUV’s repeated missed deadlines, and the slow-motion response by the rest of the industry to fill the void with alternatives, is having ripple effects in every facet and corner of the semiconductor industry. It’s making design harder and more expensive, introducing potential errors into the DFM flow, and greatly increasing the amount of time it takes to process wafers. It’s also adding a ... » read more

EUV Reaches A Crossroads


[gettech id="31045" comment="EUV"] (EUV) [getkc id="80" comment="lithography"] is at a crossroads. 2014 represents a critical year for the technology. In fact, it may answer a pressing question about EUV: Does it work or not? It’s too early to make that determination right now, but there are more uncertainties than ever for the oft-delayed technology. Originally aimed for the 65nm node in... » read more

Advanced Lithography: Moore’s Law Moves On


Every February, experts in nano patterning technologies converge in San Jose, Calif., to present their road maps, brainstorms and results at the SPIE Advanced Lithography Symposium. This year, there was more confusion than ever, partly the result of sessions in unlabeled (but beautiful) new ballrooms at the Convention Center, but mostly because of industry divergences. There is no longer a s... » read more

Next-Generation Lithography


Aki Fujimura, CEO of D2S, sat down with Semiconductor Engineering to talk about the challenges of moving to the next process nodes and how that will affect everything from lithography to the write time, size and cost of photomasks. [youtube vid=L96vi-BjhDU] » read more

Tech Talk: Multipatterning


Mentor Graphics' David Abercrombie shows how multi patterning is supposed to be done, and what sorts of problems can crop up along the way. Now that EUV has hit another hiccup, the semiconductor industry has little choice. [youtube vid=tOs_OMSh4Nk] » read more

EUV Suffers New Setback


ASML Holding’s initial, production-worthy extreme ultraviolet (EUV) lithography tool has suffered a setback during a recent trial run at Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC). TSMC disclosed the problem during a public presentation at the 2014 Advanced Lithography conference in San Jose, Calif. During the trial run at TSMC, the EUV source crashed due to a misalignment of the l... » read more

Interconnect Challenges Grow


Qualcomm outlined the technology challenges facing mobile chip suppliers at a recent event. In no particular order, the challenges include the usual suspects—area scaling, power reduction, performance and cost. Another concern for Qualcomm is an often-overlooked part of the equation—the backend-of-the-line (BEOL). In chip production, the BEOL is where the interconnects are formed within ... » read more

Lithography-Enabled Scaling Challenges


The semiconductor industry is being challenged as never before when it comes to lithography-enabled scaling. While development of new patterning techniques and resists as well as inspection and metrology capabilities have helped device scaling advance, major issues continue to challenge the future of Moore’s Law. There’s an industry shift from lithography-enabled 2D devices to materials-ena... » read more

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