tag: advanced packaging

Chiplets For The Masses
By Brian Bailey - 03 Mar, 2021 - Comments: 2

Chiplets are a compelling technology, but so far they are available only to a select few players in the industry. That's changing, and the industry has taken little steps to get there, but timing for when you will be able to buy a chiplet to integrate into your system remains uncertain. While new fabrication nodes continue to be developed, scaling is coming to an end, be it for physical or e... » read more

Predicting And Avoiding Failures In Automotive Chips
By Ed Sperling - 02 Mar, 2021 - Comments: 0

Semiconductor Engineering sat down to discuss automotive electronics reliability with Jay Rathert, senior director of strategic collaborations at KLA; Dennis Ciplickas, vice president of advanced solutions at PDF Solutions; Uzi Baruch, vice president and general manager of the automotive business unit at OptimalPlus; Gal Carmel, general manager of proteanTecs' Automotive Division; Andre van de ... » read more

Surviving The Three Phases Of High Density Advanced Packaging Design
By Siemens EDA - 24 Feb, 2021 - Comments: 0

The growth of High Density Advanced Packages (HDAP) such as FOWLP, CoWoS, and WoW is triggering a convergence of the traditional IC design and IC package-design worlds. To handle these various substrate scenarios, process transformation must occur. This paper discusses the three phases of HDAP design and provides tips on how to survive their challenges. To read more, click here. » read more

Brazil Paves New Semiconductor Path
By Mark LaPedus - 22 Feb, 2021 - Comments: 3

After struggling to get its semiconductor industry off the ground for the last several years, Brazil finally may have found its place in the market with the development of IC design services, memory modules and packaging. Brazil exists well under the radar when it comes to semiconductors. But with little or no fanfare, the nation over the years has been trying to build fabs, assemble chips a... » read more

Shortages, Challenges Engulf Packaging Supply Chain
By Mark LaPedus - 18 Feb, 2021 - Comments: 0

A surge in demand for chips is impacting the IC packaging supply chain, causing shortages of select manufacturing capacity, various package types, key components, and equipment. Spot shortages in packaging surfaced in late 2020 and have since spread to other sectors. There are now a variety of choke points in the supply chain. Wirebond and flip-chip capacity will remain tight throughout 2021... » read more

WLFO For High-Performance Low-Cost Packaging Of RFMEMS-CMOS
By Amkor - 17 Feb, 2021 - Comments: 0

Navigating the trade-offs between performance, size, cost and reliability can be a challenge when considering integrated circuit (IC) packaging and the end-application. The integration of micro-electromechanical systems (MEMS), either monolithic or heterogeneous, introduces yet another level of complexity that has only recently been a major focus of multi-device packaging. Wafer-level fanout (W... » read more

Roaring ’20s For The Chip Industry
By Brian Bailey - 28 Jan, 2021 - Comments: 0

2020 was a good year for the semiconductor industry and the EDA industry that fuels it, but 2021 has the opportunity to be even better. New end application markets continue to open, and what were once seen as technical hurdles are leading to a multitude of innovative solutions, all of which need suitable tooling. No company can afford to invest everywhere, and so for EDA companies, their rel... » read more

The Chip Industry’s Next-Gen Roadmap
By Mark LaPedus - 21 Jan, 2021 - Comments: 1

Todd Younkin, the new president and chief executive of the Semiconductor Research Corp. (SRC), sat down with Semiconductor Engineering to talk about engineering careers, R&D trends and what’s ahead for chip technologies over the next decade. What follows are excerpts of that conversation. SE: As a U.S.-based chip consortium, what is SRC's charter? Younkin: The Semiconductor Research... » read more

Stronger, Better Bonding In Advanced Packaging
By Katherine Derbyshire - 21 Jan, 2021 - Comments: 1

System-in-package integrators are moving toward copper-to-copper direct bonding between die as the bond pitch goes down, making the solder used to connect devices in a heterogenous package less practical. In thermocompression bonding, protruding copper bumps bond to pads on the underlying substrate. In hybrid bonding, copper pads are inlaid in a dielectric, reducing the risk of oxidation. ... » read more

Die-To-Die Stress Becomes A Major Issue
By Ann Mutschler - 14 Jan, 2021 - Comments: 2

Stress is becoming more critical to identify and plan for at advanced nodes and in advanced packages, where a simple mismatch can impact performance, power, and the reliability of a device throughout its projected lifetime. In the past, the chip, package, and board in a system generally were designed separately and connected through interfaces from the die to the package, and from the packag... » read more

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