Smarter Ways To Manufacture Chips


OSAT and wafer fabs are beginning to invest in Industry 4.0 solutions in order to improve efficiency and reduce operating costs, but it's a complicated process that involves setting up frameworks to evaluate different options and goals. Semiconductor manufacturing facilities have relied on dedicated automation teams for decades. These teams track and schedule chip production, respond to equi... » read more

Combination of AI Techniques To Find The Best Ways to Place Transistors on Silicon Chips


A new technical paper titled "AutoDMP: Automated DREAMPlace-based Macro Placement" was published by researchers at NVIDIA. Abstract: "Macro placement is a critical very large-scale integration (VLSI) physical design problem that significantly impacts the design power-performance-area (PPA) metrics. This paper proposes AutoDMP, a methodology that leverages DREAMPlace, a GPU-accelerated place... » read more

Cooling The Data Center


Since British mathematician and entrepreneur Clive Humby coined the rallying cry, “Data is the new oil,” some 20 years ago, it has been an upbeat phrase at data science conferences. But in engineering circles, that increasingly includes a daily grind of hardware challenges, and chief among them is how to cool the places where all that data is processed and stored. An estimated 65 zettaby... » read more

Is RISC-V Ready For Supercomputing?


RISC-V processors, which until several years ago were considered auxiliary processors for specific functions, appear to be garnering support for an entirely different type of role — high-performance computing. This is still at the discussion stage. Questions remain about the software ecosystem, or whether the chips, boards, and systems are reliable enough. And there are both business and t... » read more

Disaggregating And Extending Operating Systems


The push toward disaggregation and customization in hardware is starting to be mirrored on the software side, where operating systems are becoming smaller and more targeted, supplemented with additional software that can be optimized for different functions. There are two main causes for this shift. The first is rising demand for highly optimized and increasingly heterogeneous designs, which... » read more

Variability Becoming More Problematic, More Diverse


Process variability is becoming more problematic as transistor density increases, both in planar chips and in heterogeneous advanced packages. On the basis of sheer numbers, there are many more things that can wrong. “If you have a chip with 50 billion transistors, then there are 50 places where a one-in-a-billion event can happen,” said Rob Aitken, a Synopsys fellow. And if Intel’s... » read more

The Human Hand: Curating Good Data And Creating An Effective Deep-Learning R2R Strategy For High-Volume Manufacturing


Currently, the semiconductor manufacturing industry uses artificial intelligence and machine learning to take data and autonomously learn from that data. With the additional data, AI and ML can be used to quickly discover patterns and determine correlations in various applications, most notably those applications involving metrology and inspection, whether in the front-end of the manufacturing ... » read more

Telecare Challenges: Secure, Reliable, Lower Power


The adoption of telecare using a variety of connected digital devices is opening the door to much more rapid response to medical emergencies, as well as more consistent monitoring, but it also is adding new challenges involving connectivity, security, and power consumption. Telecare has been on the horizon for the better part of two decades, but it really began ramping with improvements in s... » read more

AI-Powered Verification


With functional verification consuming more time and effort than design, the chip industry is looking at every possible way to make the verification process more effective and more efficient. Artificial intelligence (AI) and machine learning (ML) are being tested to see how big an impact they can have. While there is progress, it still appears to be just touching the periphery of the problem... » read more

Improving PPA With AI


AI/ML/DL is starting to show up in EDA tools for a variety of steps in the semiconductor design flow, many of them aimed at improving performance, reducing power, and speeding time to market by catching errors that humans might overlook. It's unlikely that complex SoCs, or heterogeneous integration in advanced packages, ever will be perfect at first silicon. Still, the number of common error... » read more

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