When Is Robustness Verification Complete?

By Janusz Kitel - 19 Dec, 2019 - Comments: 0

Understandably, hardware designed for an aircraft, or indeed any safety critical application, must be robust. I also believe that all engineers wish to verify their designs as thoroughly as possible, anyway. However, there are limiting factors; most notably the high complexity of most designs. Since we are unable to discover and verify the design against all abnormal conditions, the main questi... » read more

Week In Review: Design, Low Power

By Jesse Allen - 13 Dec, 2019 - Comments: 0

Rambus finalized its acquisition of the silicon IP, secure protocols and provisioning business from Verimatrix, formerly Inside Secure, for $45 million at closing, and up to an additional $20 million, subject to certain revenue targets in 2020. RISC-V SiFive unveiled two new product families. The SiFive Apex processor cores target mission-critical processors with Size, Weight, and Power (SW... » read more

Week In Review: Design, Low Power

By Jesse Allen - 06 Dec, 2019 - Comments: 0

Cadence signed a deal to buy National Instruments’ AWR business unit for about $160 million in cash, a move that Cadence describes as a way to broaden its market into intelligent system design. AWR’s strength is high-frequency RF design automation tools, particularly in the millimeter wave and microwave spectrums, which are critical for radar and 5G. It also has technology for III-V materia... » read more

Week In Review: Design, Low Power

By Jesse Allen - 29 Nov, 2019 - Comments: 0

Aldec launched the HES-MPF500-M2S150 Development Kit for early co-development and co-verification of hardware and software for FPGA-based embedded systems that will use devices from either or both of Microchip’s PolarFire or SmartFusion2 families. The HES-MPF500-M2S150 Development Kit features Microchip’s low power PolarFire MPF500T FCG1152 FPGA, which has 481k logic elements, 1480 math blo... » read more

Week In Review: IoT, Security, Autos

By Susan Rambo - 29 Nov, 2019 - Comments: 0

Internet of Things Amazon is expanding its IoT services. Alexa Voice Services will require less processing power on the device, moving from the 100MB of RAM and Arm Cortex A microprocessor to 1MB and an Arm Cortex-M. Amazon will do more of the processing in the cloud, enabling developers to add Alexa to smaller, single purpose devices. “It just opens up the what we call the real ambient inte... » read more

Developing Robust Finite State Machines Code With Lint Tools

By Alex Gnusin - 26 Nov, 2019 - Comments: 0

As design size and complexity grows, the design verification effort grows even more. It takes significant amount of time to thoroughly verify complex control logic of a design, which is the key and the most critical component of design functionality. One of the most common design patterns in the control logic design are finite state machines. They could be designed in different styles, state an... » read more

Week In Review: IoT, Security, Automotive

By Susan Rambo - 22 Nov, 2019 - Comments: 0

Automotive Porsche’s electric race car, the 99X Electric, used ANSYS Technology’s system-level simulation solutions to create an advanced electric powertrain. The powertrain is also being adapted for use in Porsche’s consumer electric cars. "ANSYS system-level simulations are instrumental for optimizing the Porsche E-Performance Powertrain's motor, gearbox, power electronics and control ... » read more

Week In Review: Design, Low Power

By Jesse Allen - 15 Nov, 2019 - Comments: 0

M&A eSilicon will be acquired by Inphi Corporation and Synopsys. Inphi is acquiring the majority of the company, including the ASIC business and 56/112G SerDes design and related IP, for $216 million in both cash and the assumption of debt. Inphi expects to combine its DSP, TiA, Driver and SiPho products with eSilicon’s 2.5D packaging and custom silicon design capabilities for electro-optics... » read more

Week in Review: IoT, Security, Automotive

By Susan Rambo - 15 Nov, 2019 - Comments: 0

Connectivity, 5G Rambus has revealed a PCI Express 5.0 interface on advanced 7nm finFET process node for heterogenous computing aimed at performance-intensive uses, such as AI, data center, HPC, storage and 400GbE networking. With a PHY and a digital controller core recently acquired Northwest Logic, the interface has 32 GT/s (gigatransfers per second) bandwidth per lane with 128 GB/s bandwidt... » read more

Service Revenue Growing With Chip Complexity

By Ann Mutschler - 04 Nov, 2019 - Comments: 0

Rising complexity, new markets, and a shortage of in-house expertise are beginning to rekindle demand for services for the first time in nearly a decade. The semiconductor industry has been racing to design chips for a variety of new and existing applications, but they are facing challenges on a number of fronts: Leading-edge chips require new architectures due to a sharp reduction in s... » read more

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tag: Aldec

When Is Robustness Verification Complete?

Week In Review: Design, Low Power

Week In Review: Design, Low Power

Week In Review: Design, Low Power

Week In Review: IoT, Security, Autos

Developing Robust Finite State Machines Code With Lint Tools

Week In Review: IoT, Security, Automotive

Week In Review: Design, Low Power

Week in Review: IoT, Security, Automotive

Service Revenue Growing With Chip Complexity