Finding And Applying Domain Expertise In IC Analytics


Behind PowerPoint slides depicting the data inputs and outputs of a data analytics platform belies the complexity, effort, and expertise that improve fab yield. With the tsunami of data collected for semiconductor devices, fabs need engineers with domain expertise to effectively manage the data and to correctly learn from the data. Naively analyzing a data set can lead to an uninteresting an... » read more

Week In Review: Manufacturing, Test


Chipmakers, OEMs Intel continues to build more fabs. First, the company announced fabs in Arizona and then Ohio. Now, Intel plans to invest up to €80 billion in the European Union over the next decade. As part of the effort, Intel plans to build two semiconductor fabs in Magdeburg, Germany. Construction is expected to begin in the first half of 2023 and production planned to come online in 2... » read more

Chiplets Enter The Supercomputer Race


Several entities from various nations are racing each other to deliver and deploy chiplet-based exascale supercomputers, a new class of systems that are 1,000x faster than today’s supercomputers. The latest exascale supercomputer CPU and GPU designs mix and match complex dies in advanced packages, adding a new level of flexibility and customization for supercomputers. For years, various na... » read more

Week In Review: Manufacturing, Test


Chipmakers Intel has announced a definitive agreement to acquire Tower, a specialty foundry vendor, for approximately $5.4 billion. With the acquisition of Tower, Intel expands its efforts in the foundry business, and put its rivals on notice. With Tower, Intel gains access to mature processes as well as specialty technologies, such as analog, CMOS image sensor, MEMS, power management and RF. ... » read more

Technology Advances, Shortages Seen For Wire Bonders


A surge in demand for IC packages is causing long lead times for wire bonders, which are used to assemble three-fourths of the world’s packages. The wire bonder market doubled last year, alongside advanced packaging’s rise. Wirebonding is an older technology that typically flies under the radar. Still, packaging houses have multitudes of these key tools that help assemble many — but no... » read more

Thermal Management Implications For Heterogeneous Integrated Packaging


As the semiconductor industry reaches lower process nodes, silicon designers struggle to have Moore's Law produce the results achieved in earlier generations. Increasing the die size in a monolithic system on chip (SoC) designs is no longer economically viable. The breakdown of monolithic SoCs into specialized chips, referred to as chiplets, presents significant benefits in terms of cost, yield... » read more

Chip-Last HDFO (High-Density Fan-Out) Interposer-PoP


Interposer Package-on-Package (PoP) technology was developed and has been in very high-volume production over the last several years for high-end mobile application processors (APs). This is due to its advantages of good package design flexibility, controllable package warpage at room temperature (25°C) and high temperature (260°C), reduced assembly manufacturing cycle time and chip-last asse... » read more

Next-Gen 3D Chip/Packaging Race Begins


The first wave of chips is hitting the market using a technology called hybrid bonding, setting the stage for a new and competitive era of 3D-based chip products and advanced packages. AMD is the first vendor to unveil chips using copper hybrid bonding, an advanced die-stacking technology that enables next-generation 3D-like devices and packages. Hybrid bonding stacks and connects chips usin... » read more

Thin Quad Die Package (QDP) Development


In the world of solid-state memory fabs, bits per mm2 rule. In the memory packaging market, mm2 of silicon per a given package thickness is the defining feature. Both the memory architecture of the wafer and the package technology take advantage of 3D structures to achieve best in class bit density. In the case of the wafer fab, 3D NAND and other technologies are pushing the envelope to meet ev... » read more

Metal Thermal Interface Material For The Next Generation FCBGA


Thermal interface materials (TIMs) have been widely adopted for improved thermal dissipation in flip chip ball grid array (FCBGA), flip chip lidded ball grid array (FCLGA) and flip chip pin grid array (FCPGA) packaging. As the next generation devices' requirements for power get even higher, enhanced thermal performance at the package level is increasingly important. A typical TIM applies a poly... » read more

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