Rising Fortunes For ICs In Health Care


Semiconductors are increasingly finding their way into a variety of medical devices, after years of slow growth and largely consumer electronics types of applications. Nearly every major chipmaker has a toehold in health care these days, and many are starting to look beyond wearable such as the Apple Watch to devices that can be relied on for accuracy and reliability. Unlike in the past, the... » read more

Blog Review: Oct. 13


Cadence's Paul McLellan checks out what Google learned in developing multiple generations of its TPU processor, including unequal advancement of logic and memory, the importance of compiler of compatibility, and designing for total cost of ownership. Siemens EDA's Jake Wiltgen argues for the importance of linting as part of eliminating systematic failures in designs complying with ISO 26262.... » read more

Execution Dependence Extension (EDE): ISA Support For Eliminating Fences


Fence instructions are a coarse-grained mechanism to enforce the order of instruction execution in an out-of-order pipeline. They are an overkill for cases when only one instruction must wait for the completion of one other instruction. For example, this is the case when performing undo logging in Non-Volatile Memory (NVM) systems: while the update of a variable needs to wait until the correspo... » read more

Blog Review: Oct. 6


Arizona State University's Jae-sun Seo and Arm's Paul Whatmough introduce a fully-parallel and fully-pipelined FPGA accelerator for sparse CNNs that can eliminate off-chip memory access and also efficiently support elementwise pruning of CNN weights. Cadence's Paul McLellan highlights trends seen at the recent Hot Chips, from machine learning and advanced packaging driving higher performance... » read more

Overview Of Medical Chip Challenges


Medical devices are adopting, and increasingly adapting, a variety of semiconductor technologies to provide new functions and capabilities in smaller form factors. In doing so, they are leveraging increasing processing capabilities, lower power, and new types of sensors to propel health care forward. Many different chip types have been used in medical devices for years, many of them develope... » read more

Blog Review: Sept. 29


Cadence's Paul McLellan checks out two of the biggest chips presented at the recent Hot Chips: a graphics chip from Intel for an upcoming supercomputer and Cerebras' wafer-scale AI chip. Synopsys' Datsen Davies Tharakan lists the top five design challenges for electric vehicles and power semiconductors and why a robust design flow can accelerate the growth of hybrid and electric vehicles goi... » read more

Software-Hardware Co-Design Becomes Real


For the past 20 years, the industry has sought to deploy hardware/software co-design concepts. While it is making progress, software/hardware co-design appears to have a much brighter future. In order to understand the distinction between the two approaches, it is important to define some of the basics. Hardware/software co-design is essentially a bottom-up process, where hardware is deve... » read more

Week In Review: Design, Low Power


U.S. government officials met with semiconductor industry companies and automakers to request supply chain information it hopes could address the current semiconductor shortage, Reuters reports. Secretary of Commerce Gina Raimondo hopes the information will enable them and industry to "get more granular into the bottlenecks and then ultimately predict challenges before they happen," but also wa... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive Cadence announced its new platform for speeding up the creation of virtual and hybrid prototypes of complex systems, such as those found in automotive systems. The Cadence Helium Virtual and Hybrid Studio enables teams to verify embedded software and firmware on virtual and hybrid configurations before the RTL is ready, in systems where software and hardware need to be created simul... » read more

Data Tsunami Pushes Boundaries Of IC Interconnects


Rapid increases in machine-generated data are fueling demand for higher-performance multi-core computing, forcing design teams to rethink the movement of data on-chip, off-chip, and between chips in a package. In the past, this was largely handled by the on-chip interconnects, which often were a secondary consideration in the design. But with the rising volumes of data in markets ranging fro... » read more

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