Blog Review: Jan. 8

By Jesse Allen - 08 Jan, 2020 - Comments: 0

Synopsys' Taylor Armerding digs into the privacy and security concerns surrounding connected toys and argues that the current practice of consumers bearing much of the burden to determine what is safe is not viable. In a podcast, Mentor's John McMillan looks back at the past decade in technology and what the next may hold in store as areas like AI and automotive get going. Cadence's Madha... » read more

Bridging Math And Engineering In ML

By Ed Sperling - 08 Jan, 2020 - Comments: 0

Steve Roddy, vice president of products for Arm’s Machine Learning Group, examines the intersection of high-level mathematics in the data science used in machine learning within area, speed, and power limitations, and how to bring these two worlds together with the least amount of disruption. » read more

Election Security At The Chip Level

By Andy Patrizio - 02 Jan, 2020 - Comments: 3

Technological advances have changed every facet of our lives, from reading to driving to cooking, but one task remains firmly rooted in 20th-century technology — voting. Electronic voting remains doggedly unavailable to most, and almost always unusable to those who have it. For more than a decade, it seems every election is accompanied by numerous reports of voting machine problems. The mo... » read more

Week In Review: Design, Low Power

By Jesse Allen - 20 Dec, 2019 - Comments: 0

M&A Intel acquired Habana Labs, a maker of programmable deep learning accelerators for the data center, for approximately $2 billion. Based in Israel, Habana was founded in 2016 but only emerged from stealth in September 2018 with the release of its first inference chip. Intel's VC arm, Intel Capital, previously invested in the startup. Intel has made numerous M&A moves in the AI space... » read more

Crossed Wires On Domains

By Brian Bailey - 19 Dec, 2019 - Comments: 1

Clock, power and reset domains can form a tangled web if systems are not architected correctly. Wires that cross these domains often require special treatment and additional analysis. They are all evolving independently, meaning that designers must keep up with the latest methodology guidelines and tool capabilities to ensure problems do not remain hidden until they get exposed in silicon. C... » read more

Will Open-Source Processors Cause A Verification Shift?

By Ann Mutschler - 19 Dec, 2019 - Comments: 0

While the promised flexibility of open source could have advantages and possibilities for processors and SoCs, where does the industry stand on verification approaches and methodologies from here? Single-source ISAs of the past relied on general industry verification technologies and methodologies, but open-source ISA-based processor users and adopters will need to review the verification flows... » read more

Blog Review: Dec. 18

By Jesse Allen - 18 Dec, 2019 - Comments: 0

Lam Research's David Haynes finds that taking advances made at 300mm and applying them via upgrades to 200mm equipment is a cost appropriate strategy to quickly improve yield and add capacity. Synopsys' Taylor Armerding looks at which of this year's many data breaches hit corporate wallets the hardest and how the cost of privacy noncompliance is expected to rise with California's CCPA and st... » read more

A Promising Future For Interconnect IP

By Rich Wawrzyniak - 17 Dec, 2019 - Comments: 0

Complexity of SoC designs continues to increase primarily due to increased demand for functionality and performance in all electronic devices. Studies that Semico Research has conducted on the SoC design landscape shows the number of discrete SIP blocks has continued to rise in response to increased market requirements from new applications and richer feature sets. Table 1: Comparison of 1st... » read more

Engineering AI To Be Ethical By Design

By Carolyn Herzog - 12 Dec, 2019 - Comments: 1

I joined Arm because of its amazing people and world-class technology. But while I’m constantly excited by the possibilities of what we can achieve, as Arm’s General Counsel I must also consider the potential harm our designs might cause if they don’t perform in the way we expect, or were put to a use we did not intend. That dilemma comes to the forefront when I think about artificial... » read more

Interdependencies Complicate IC Power Grid Design

By Ann Mutschler - 12 Dec, 2019 - Comments: 0

Creating the right power grid is a growing problem in leading-edge chips. IP and SoC providers are spending a considerable amount of time defining the architecture of logic libraries in order to enable different power grids to satisfy the needs of different market segments. The end of Dennard scaling is one of the reasons for the increased focus. With the move to smaller nodes, the amount of... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

Legacy Process Nodes Going Strong

The critical, and growing, significance of mature node chips and processes.

by Bryon Moyer

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?