tag: ArterisIP

Big Challenges, Changes For Debug
By Ann Mutschler - 04 Dec, 2017 - Comments: 1

By Ann Steffora Mutschler & Ed Sperling Debugging a chip always has been difficult, but the problem is getting worse at 7nm and 5nm. The number of corner cases is exploding as complexity rises, and some bugs are not even on anyone's radar until well after devices are already in use by end customers. An estimated 39% of verification engineering time is spent on debugging activities the... » read more

Heterogeneous Cache Coherence Requires A Common Internal Protocol
By Kurt Shuler - 30 Nov, 2017 - Comments: 0

Machine learning and artificial intelligence systems are driving the need for systems-on-chip containing tens or even hundreds of heterogeneous processing cores. As these systems expand in size and complexity, it becomes too difficult to manage data flow solely through software means. An approach that simplifies software while improving performance and power consumption is to implement hardware... » read more

Move Data Or Process In Place? (Part 2)
By Brian Bailey - 20 Nov, 2017 - Comments: 0

Chip architectures, and even local system architectures, long have found that the best way to improve total system performance and power consumption is to move memory as close to processors as possible. This has led to cache architectures and memories that are tuned for those architectures, as discussed in part 1 of this article. But there are several tacit assumptions made in these architectur... » read more

The Week In Review: Design
By Jesse Allen - 10 Nov, 2017 - Comments: 0

IP Cryptographic flaws have been discovered in the IEEE P1735 standard for encrypting IP and managing access rights. A team from the University of Florida found "a surprising number of cryptographic mistakes in the standard. In the most egregious cases, these mistakes enable attack vectors that allow us to recover the entire underlying plaintext IP." The researchers warn that an adversary coul... » read more

China’s Ambitious Automotive Plans
By Ed Sperling - 08 Nov, 2017 - Comments: 1

China has big plans for cars—and other related markets. After years of trailing behind Japanese, European and U.S.-based carmakers in automotive technology, reliability, status, and even market share within its own political borders, the country is making a concerted push into internally developed and manufactured assisted- and self-driving vehicles. The strategy plays out well for China o... » read more

Chiplets Gaining Steam
By Ann Mutschler - 06 Nov, 2017 - Comments: 0

Building chips from pre-verified chiplets is beginning to gain traction as a way of cutting costs and reducing time to market for heterogeneous designs. The chiplet concept has been on the drawing board for some time, but it has been viewed more as a possible future direction than a necessary solution. That perception is beginning to change as complexity rises, particularly at advanced nodes... » read more

ADAS Design Shifts Toward Hardware
By Kurt Shuler - 30 Oct, 2017 - Comments: 0

Autonomous driving will challenge system-level designers like never before with the simultaneous integration of three critical areas: Supercomputing complexity, real-time embedded performance, and functional safety. To get there, developers will need to shift their focus from a software-centric approach toward custom hardware development to produce a system that meets the safety, cost, and powe... » read more

How To Handle Concurrency
By Brian Bailey - 30 Oct, 2017 - Comments: 3

The evolution of processing architectures has solved many problems within a chip, but for each problem solved another one was created. Concurrency is one of those issues, and it has been getting much more attention lately. While concurrency is hardly a new problem, the complexity of today’s systems is making it increasingly difficult to properly design, implement and verify the software an... » read more

Move Data Or Process In Place?
By Brian Bailey - 26 Oct, 2017 - Comments: 0

Should data move to available processors or should processors be placed close to memory? That is a question the academic community has been looking at for decades. Moving data is one of the most expensive and power-consuming tasks, and is often the limiter to system performance. Within a chip, Moore's Law has enabled designers to physically move memory closer to processing, and that has rema... » read more

The Week In Review: Design
By Jesse Allen - 20 Oct, 2017 - Comments: 0

M&A Synopsys acquired Sidense, a provider of antifuse one-time programmable (OTP) non-volatile memory (NVM) for standard-logic CMOS processes. Sidense was founded in 2004 in Canada. Terms of the deal were not disclosed. ArterisIP acquired the software and intellectual property rights of iNoCs, a provider of network-on-chip IP and design tools. Founded in 2007, the Swiss company was spun... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2024 SMG   |  Terms of Service  |  Privacy Policy